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Andrea Panigada

STMicroelectronics

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Publication

Featured researches published by Andrea Panigada.

international solid-state circuits conference | 2005

An 80MHz 4/spl times/ oversampled cascaded /spl Delta//spl Sigma/-pipelined ADC with 75dB DR and 87dB SFDR

Alessandro Bosi; Andrea Panigada; Giovanni Cesura; R. Castello

A 2/sup nd/-order 4b /spl Delta//spl Sigma/ modulator in cascade with a 9b pipeline clocked at 80MHz achieves 75dB DR, 74dB peak SNR and more than 87dB SFDR in a 10MHz bandwidth by means of background digital linearization and noise-cancellation algorithms. The 0.18/spl mu/m CMOS chip consumes 240mW including reference generator, digital decimator and correction logic.

Archive | 2004

Analog-to-digital converter with correction of offset errors

Giovanni Cesura; Andrea Panigada; Nadia Serina

Archive | 2004

Multistage analog-to-digital converter

Giovanni Cesura; Andrea Panigada; Alessandro Bosi

Archive | 2004

Method of correction of the error introduced by a multibit DAC incorporated in an ADC

Giovanni Cesura; Andrea Panigada

Archive | 2003

A pipeline analog-to-digital converter with correction of inter-stage gain errors

Alessandro Bosi; Giovanni Cesura; Andrea Panigada

Archive | 2004

Power amplification device, especially with reduced input dynamic swing, in particular for a cellular mobile telephone

Patrick Cerisier; Andrea Panigada

Archive | 2003

Means for power amplification, in particular with reduced input dynamic, for a mobile telephone

Patrick Cerisier; Andrea Panigada

Archive | 2003

Verfahren zur Korrektion des durch einen Multibit-DA-Wandlers in einem AD-Wandler verursachten Fehlers Method for correcting the damage caused by a multibit DA converter in an AD converter error

Giovanni Cesura; Andrea Panigada

Archive | 2003

Pipeline Analog-Digital-Wandler mit Korrektion von Verstärkungsfehlern zwischen den Stufen Pipeline Analog-to-digital converter with the correction of gain errors between the stages

Giovanni Cesura; Andrea Panigada; Alessandro Bosi

Archive | 2003

Analog-Digital-Wandler mit Korrektur von Verschiebungsfehlern Analog-to-digital converter with correction of offset errors

Giovanni Cesura; Andrea Panigada; Nadia Serina

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Collaboration

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Giovanni Cesura

University of Pavia

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Alessandro Bosi

STMicroelectronics

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Giovanni Cesura

University of Pavia

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Patrick Cerisier

STMicroelectronics

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Nadia Serina

STMicroelectronics

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R. Castello

University of Pavia

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