Andrzej Mazurak

Effect of inner interface traps on high-k gate stack admittance characteristics

Admittance parameters analysis can give useful information on traps located at the inner interface in high-k gate stacks. The presented study reveals that conductance characteristics are more valuable for characterization procedure then capacitance ones. It particularly considers structures in which tunnel communication via traps cannot be neglected.

Some Issues of Modeling the Double Barrier Metal-Oxide-Semiconductor Tunnel Structures

The paper discusses some issues of modeling the MOS tunnel structure with a gate stack containing a semiconductor quantum well (double barrier MOS system). The considerations are illustrated by simulations with the use of a theoretical model. Results of simulations are compared with experimental characteristics of fabricated DB MOS diodes.

Impact of nanocrystal(s) location on C-V-t and I-V-t characteristics of ncMOS structures

We present the study of impact of the nanocrystal position and oxide layers thicknesses of the metal-insulatorsemiconductor structure with nanocrystals embedded in the insulator layer on the time-dependent current-voltage and capacitance-voltage characteristics. The theoretical considerations are based on the developed numerical model of a double-barrier MOS structure. The dominant current path in the structure is analysed in respect to the nanocrystals charging/discharging processes.

Effect of interface traps parameters on admittance characteristics of the MIS (metal-insulator-semiconductor) tunnel structures

Interface traps density (Nit) and gate insulator thickness (tox) impact on MIS tunnel structure electrical characteristics is discussed in respect to bias voltage range corresponding to inversion in the semiconductor substrate region. Effect of Nit and tox on equilibrium and non-equilibrium operation regime of the device is presented. Different models of the small-signal response of interface traps are proposed and discussed in respect to several phenomena related to the traps charging and discharging processes. Presented analysis was performed for the MIS structures with the gate dielectric made of silicon dioxide (SiO2) and hafnium oxide (HfOx). The obtained results proved that the surface density of interface traps (Nit) and the insulator thickness (tox) have correlated impact on the transition between equilibrium and non-equilibrium operation of the MIS tunnel structures.

Investigation of temperature effect on electrical characteristics of the double barrier metal-oxide-semiconductor structure

Analysis of the temperature effect on electrical characteristics of double barrier metal-oxide-semiconductor structure is presented in the work. Results of the simulation of electrical characteristics obtained with the original theoretical model are compared with the measurements of the fabricated DB MOS structure.

Investigation of current-voltage characteristics of the transistor structures with double-potential barrier DBMOS

An influence of the potential in the quantum well in the DB MOS structure on its current-voltage characteristics is considered under the assumption of a sequential tunneling through the double barrier system due to the effective recombination in the well.

WKB approximation based formula for tunneling probability through a multi-layer potential barrier

In this work, we present a theoretical derivation of the analytical formula for tunneling probability through an n-layer barrier basing on the Wentzel-Kramers-Brillouin (WKB) and the effective mass approximations. The accuracy of the derived formula is analysed by comparison with the transfer matrix method (TMM). The effect of the electric charge distribution in a stack on the tunnel current is considered.