Anna Richelli
University of Brescia
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Publication
Featured researches published by Anna Richelli.
IEEE Transactions on Power Electronics | 2009
Anna Richelli; Luigi Colalongo; Silvia Tonoli; Zsolt Miklós Kovács-Vajna
In this paper, a dc/dc converter is presented that can boost very low voltages to the typical supply voltages of current integrated circuits (1.2 V-1.5 V). The converter is based on a new hybrid inductive and capacitive architecture and it is suitable for power harvesting applications too. The measured prototype can supply 1.2 V by converting an input voltage of 200 mV delivered by a thermopile exposed to a 5degC thermal gradient. A chip was designed and fabricated using a United Microelectronics Corp. (UMC) 180-nm low-threshold CMOS process. Measurements on the chip confirm the validity of the design.
IEEE Transactions on Industrial Electronics | 2012
Anna Richelli; Simone Comensoli; Zsolt Miklós Kovács-Vajna
With the increasing use of low-voltage portable devices and growing requirements of functionalities embedded into such devices, efficient dc/dc conversion and power management techniques are needed. In this paper, an architecture for boosting extremely low voltages (about 100 mV) to the typical supply voltages of current integrated circuits is presented which is suitable for power harvesting applications too. Starting from a 120-mV supply voltage, the converter reaches an output voltage of 1.2 V, providing an output current of 220 μA and exhibiting a maximum power efficiency of about 30%. Along with the dc/dc converter, a power management circuit is presented, which can regulate the output voltage and improve the overall efficiency. A test chip was fabricated using a United Microelectronics Corporation 180-nm low-threshold CMOS process.
IEEE Journal of Solid-state Circuits | 2004
Anna Richelli; Luigi Colalongo; M. Quarantelli; M. Carmina; Zs. M. Kovács-Vajna
To the authors knowledge, this is the first time that a paper demonstrates the feasibility of a fully integrated step-up converter based on inductive elements. The prototype is fabricated in the ST M8 0.18-/spl mu/m process, uses a supply voltage of 1.8 V, and provides an output mean voltage of about 6 V at 10 k/spl Omega/ resistive load with a 60-MHz external clock frequency.
IEEE Transactions on Electromagnetic Compatibility | 2010
Anna Richelli
A CMOS operational amplifier with high immunity to electromagnetic interferences is presented. It is based on an easy modification of the differential pair with active current load. The proposed input stage can be fabricated in standard CMOS technologies, and it neither requires extra mask levels, such as triple well, nor external components. Analysis and results are provided for very large interferences, which arise from the input pin.
european solid-state circuits conference | 2005
Luca Mensi; Luigi Colalongo; Anna Richelli; Zs. M. Kovács-Vajna
In this paper, a new charge pump architecture is presented: it is based on PMOS pass transistors with dynamic biasing of gates and bodies. By controlling the gate and body voltages of each pass transistor, the voltage loss due to the device threshold is removed and the charge is pumped from one stage to the other with negligible voltage drop. Furthermore, the overdrive voltage of the pass transistors grows progressively from the first to the last boost stage. This new architecture was developed and validated through simulations and experimental measurements on AMS 0.8/spl mu/m standard CMOS technology.
IEEE Transactions on Electromagnetic Compatibility | 2004
Anna Richelli; Luigi Colalongo; Michele Quarantelli; Zsolt Miklós Kovács-Vajna
This paper addresses a new approach to design a CMOS operational amplifier which provides a good tradeoff between high gain and strong immunity to electromagnetic interferences. The proposed amplifier is based on two main blocks: the first is a fully differential folded cascode with modified input pair and the second is a source cross coupled AB class buffer. Thanks to the folded cascode stage and to the symmetrical output buffer, the amplifier exhibits both intrinsic robustness to interferences and good amplifier performances. The circuit was fabricated in a 0.8-/spl mu/m n-well CMOS technology (AMS CYE process). Experimental results, in terms of electromagnetic interference (EMI) immunity, are presented and successfully compared with commercial amplifiers. Measurements carried out on the chip and the amplifier overall performances are provided along with the corresponding simulation results.
IEEE Transactions on Electromagnetic Compatibility | 2006
Andrea Pretelli; Anna Richelli; Luigi Colalongo; Zsolt Miklós Kovács-Vajna
This paper presents a successful approach to increase the electromagnetic interference (EMI) immunity of CMOS bandgap reference circuits. Layout techniques along with some changes in the reference schematics lead to a robust electromagnetic immunity, preserving good overall performances. Measurement results confirm the low susceptibility of the proposed circuits. They exhibit only a few millivolts shift, for interfering signals of 1 Vpp in the frequency range of 1 MHz to 4 GHz, compared to the classical topologies that may reach more than 1 V. The circuits were fabricated in a 0.8-mum standard CMOS technology
IEEE Transactions on Electromagnetic Compatibility | 2012
Anna Richelli
An easy solution to increase the immunity to electromagnetic interferences in recent low-voltage CMOS amplifiers is presented. It is based on a simple modification of the input stage, which can be fabricated in standard CMOS technologies and does not require extra mask levels, such as triple well, nor external components. Analysis and results are provided for very large interferences, arising from the input pin.
international solid-state circuits conference | 2007
Anna Richelli; Luca Mensi; Luigi Colalongo; Pier Luigi Rolandi; Zsolt Miklós Kovács-Vajna
A charge-pump architecture is presented with an improved power efficiency and a high voltage output compared to the known Dickson and Favrat architectures due to partial reuse of the charge stored on the capacitors. An 8-stage charge pump fabricated in a 0.13mum CMOS process has a 1.2V supply and a 100MHz clock. The measured performance indicates that the efficiency can be 25% higher than a Favrat cell. The efficiency increases with the number of stages, reaching 60% with 10 stages.
international symposium on power electronics, electrical drives, automation and motion | 2012
Giovanni Bassi; Luigi Colalongo; Anna Richelli; Zsolt Miklós Kovács-Vajna
A fully-integrated DC/DC converter for energy harvesting applications is presented. The startup-voltage of the converter is about 140mV, the output voltage exceeds 1.5V, with a power efficiency at least 20%. The architecture for boosting such extremely low voltages is based on an ultra-low-voltage oscillator cross connected to two phase charge pump. The overall circuit does not require any external components and can be fully integrated in a standard CMOS low voltage technology. A test-chip has been designed in UMC 0.18μm process.