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Dive into the research topics where Anthony J. Collins is active.

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Featured researches published by Anthony J. Collins.


international solid-state circuits conference | 2014

6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters

Christophe Erdmann; Donnacha Lowney; Adrian Lynam; Aidan Keady; John McGrath; Edward Cullen; Daire Breathnach; Denis Keane; Patrick T. Lynch; Marites De La Torre; Ronnie De La Torre; Peng Lim; Anthony J. Collins; Brendan Farley; Liam Madden

A reconfigurable heterogeneous 3D-IC is assembled from two 28 nm FPGA die with 580 k logic cells and two 65 nm mixed signal die on a 65 nm interposer in a 35 mm 2 CS-BGA package. One mixed signal die consists of sixteen 16 bit current steering DACs, the other die consists of sixteen 13 bit pipelined ADCs. The interposer provides optimal system partitioning; noise isolation and high density interconnect between subsystems. Receive SNDR > 61.6 dBFS to Nyquist at 500 MS/s and transmit SFDR > 63.8 dBc to 400 MHz at 1.6 GS/s is measured. Ultralow FPGA to converter die interface power of 0.3 mW/Gb/s is achieved and measured digital to analog isolation > 92dB. The solution can be dynamically optimized for channel count, power and speed.


international solid-state circuits conference | 2017

16.3 A 330mW 14b 6.8GS/s dual-mode RF DAC in 16nm FinFET achieving −70.8dBc ACPR in a 20MHz channel at 5.2GHz

Christophe Erdmann; Edward Cullen; Damien Brouard; Roberto Pelliconi; Bob Verbruggen; John McGrath; Diarmuid Collins; Marites De La Torre; Patrick T. Lynch; Peng Lim; Anthony J. Collins; Brendan Farley

Direct-RF synthesis has gained increasing attention in recent years [1] [2] as it simplifies the transmitter system by eliminating the intermediate frequency stage. It also offers the opportunity to address the extensive range of cellular bands with the same architecture and building blocks. Direct synthesis of carriers in the 5 to 6GHz unlicenced bands remains a challenge for RF-DACs operating in the 1st Nyquist band, as sampling rates in excess of 12GS/s are required. A more power efficient way to synthesize directly these frequencies is to use wideband mixing-DACs, which increase the output power in the 2nd and 3rd Nyquist bands [3]. In [3] the mixing is done using the quad-switch configuration, which doubles the number of switches and drivers, directly impacting the overall DAC width. In [4] the mixer is inserted in-line between the current cell switch and the output cascode, which requires additional headroom in the output stage. Both implementations impact the overall performance and power of the DAC even when the mixing operation is not used.


Archive | 2004

Reconfiguration port for dynamic reconfiguration - sub-frame access for reconfiguration

Vasisht Mantra Vadi; David P. Schultz; John D. Logue; John McGrath; Anthony J. Collins; F. Erich Goetting


Archive | 2004

Reconfiguration port for dynamic reconfiguration

Vasisht Mantra Vadi; David P. Schultz; John D. Logue; John McGrath; Anthony J. Collins; F. Erich Goetting


Archive | 2006

System monitor in a programmable logic device

F. Erich Goetting; John K. Jennings; Anthony J. Collins; Patrick J. Quinn


Archive | 2004

Reconfiguration port for dynamic reconfiguration-system monitor interface

Vasisht Mantra Vadi; David P. Schultz; John D. Logue; John McGrath; Anthony J. Collins; F. Goetting


Archive | 2004

Boundary-scan circuit used for analog and digital testing of an integrated circuit

Anthony J. Collins; David P. Schultz; Neil G. Jacobson; Edward S. McGettigan; Bradley K. Fross


Archive | 2004

Reconfiguration port for dynamic reconfiguration-controller

Vasisht Mantra Vadi; David P. Schultz; John D. Logue; John McGrath; Anthony J. Collins; F. Goetting


Archive | 2004

Dynamic reconfiguration of a system monitor (DRPORT)

F. Erich Goetting; John McGrath; Anthony J. Collins


Archive | 2011

Integrated circuit enabling the communication of data and a method of communicating data in an integrated circuit

Anthony J. Collins

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