Antonios N. Dadaliaris

Slice-based parallelization in HEVC encoding: Realizing the potential through efficient load balancing

The new video coding standard HEVC (High Efficiency Video Coding) offers the desired compression performance in the era of HDTV and UHDTV, as it achieves nearly 50% bit rate saving compared to H.264/AVC. To leverage the involved computational overhead, HEVC offers three parallelization potentials namely: wavefront parallelization, tile-based and slice-based. In this paper we study slice-based parallelization of HEVC using OpenMP on the encoding part. In particular we delve on the problem of proper slice sizing to reduce load imbalances among threads. Capitalizing on existing ideas for H.264/AVC we develop a fast dynamic approach to decide on load distribution and compare it against an alternative in the HEVC literature. Through experiments with commonly used video sequences, we highlight the merits and drawbacks of the tested heuristics. We then improve upon them for the case of Low-Delay by exploiting GOP structure. The resulting algorithm is shown to clearly outperform its counterparts achieving less than 10% load imbalance in many cases.

Domocus: Lock free parallel legalization in standard cell placement

In the cell placement problem a circuits cells must be placed within a specified chip area so that they are row aligned and contain no overlaps. The problem is usually tackled in phases, whereby in the first phase a global placer performs an initial spreading of cells with regards to some optimization criterion, most commonly wire length minimization. The output of the first phase might violate alignment and overlap constraints, therefore in a second phase, called legalization, the target is to restore constraint violations while incurring minimal changes compared to global placement. Since legalization may also be a subcomponent of iterative global placers, efficient algorithms both in terms of solution quality and running time are of paramount importance. In this paper we present a framework for lock-free parallelism of legalization scheme. The framework is evaluated using Abacus, an algorithm that is well documented to achieve good solution quality but incurring high running time. We term the resulting legalization algorithm Domocus. Through experiments with commonly used benchmark circuits, we conclude on the scalability and efficiency of Domocus.

On planning the adoption of new video standards in social media networks: a general framework and its application to HEVC

In recent years, we have witnessed an explosion in the growth of social media networks, powered by the proliferation of handheld smart devices with high processing capabilities and a plethora of sensors including high-resolution cameras. A key component of information exchange in such networks, accounting for the majority of network traffic, is video. Currently, the de facto video coding standard in use is H.264/AVC which was sufficient in addressing the challenges posed by HD more than a decade ago, but is less than efficient in the new era of 4K smart device cameras and 8K TV screens. Given that newer standards exist and are capable of achieving higher compression rates at the same quality compared to H.264/AVC, we envision that within the next few years, the related industry will shift toward one of the newer video coding standards. For a social media network, such a transition poses manifold challenges, one of them being the need to transcode previous content in the newly adopted standard. In this paper, we illustrate a framework for performing such transition in a smooth manner. The framework, algorithms and strategies developed are applicable, perhaps with minor changes, regardless of the targeted standard for adoption. We detail on framework components through simulation experiments, using as a yardstick the adoption of high efficiency video coding. Results demonstrate that depending on the targeted social platform, different strategies should be applied, while the cost and benefits of the paradigm shift may vary significantly.

The Implementation of a Web Application for Screening Children with Dyslexia

Developmental dyslexia is defined as an unexpected specific and persistent failure to acquire efficient reading skills despite conventional instruction, adequate intelligence and sociocultural opportunity. The main aim of the present research protocol was to construct a web screening battery of tests in order to screen children’s reading, orthographic and cognitive skills. The main hypothesis of the present study was that Greek students that were already diagnosed as dyslexic, shall present significantly lower scores. A total of sixty, right handed children (30 male and 30 female, age range 8–11 years old M = 8.93, SD = 0.83) participated in this study. Reading, cognitive and orthographic skills of children with dyslexia and typically achieving children were examined, using a battery that consisted of seven tasks. Subsequent analysis of variance revealed that the children with dyslexia had statistically significant (p < 0.01) lower mean scores of correct answers and larger latencies in all tasks compared to their average peers that participated at the control group.

The use of LEGO mindstorms in elementary schools

Popular interest in robotics has increased significantly over the last years. It has been claimed that robotics can provide new benefits to the learning process at all levels of education. The main ideas of the present study adhered to the constructionist theory, according to which the learning process is not only transmitted from teacher to pupil, but rather constructed in the mind of the pupil in the form of active learning. The purpose of the present study was to implement a robotic toy (Lego Mindstorms NXT TM) in a Greek primary school, in order to teach twelve year-old children some of the basic concepts of geometry. The main hypothesis of the present study was that children who used the Lego Mindstorms NXT platform would score higher on an evaluation questionnaire than children who formed the control group. Descriptive statistical analysis was performed in order to evaluate the correct answers of the questionnaires. Statistical analysis revealed that children who participated in the experimental group performed better in the 21 items of the questionnaire. Moreover, they mentioned that the geometry course became more interesting and drew their attention in comparison to the courses that were taught through the standard teaching process. It is apparent that the present study follows the line of inquiries that supports that robotics can make a significant impact to education. Robots can be a tool that can enhance the skills of children.

Performance Evaluation of Tetris-based Legalization Heuristics

Algorithms for standard cell placement legalization have attracted significant research efforts in the past. A prominent member of this category is the Tetris algorithm which is a simple and particularly fast method for legalizing an initial placement containing overlaps. In the relevant literature sophisticated legalization schemes were proposed using Tetris as a performance yardstick. In order to achieve better performance such schemes usually sacrifice the fast running time of Tetris by a large margin. In this paper we turn our focus on simple Tetris variations that improve performance without seriously compromising running time. Specifically, we present five generic heuristic variations of the initial Tetris algorithm. Through experimental evaluation we conclude on the merits of each approach.

Adaptive Tile Parallelization for Fast Video Encoding in HEVC

As large multimedia providers rely more and more on Cloud resources to perform video coding and transcoding, designing fast and efficient coders that take advantage of parallelization, particularly for the new video standard HEVC, is of paramount importance. Tiles were introduced in HEVC to provide an alternative parallelization granularity compared to the previous standard H.264/AVC. The premise was that with the rectangular tile shapes, spatial correlation between samples could be better exploited compared to slices, leading to increased coding efficiency. While a significant amount of research was done in parallelizing video coding, few works exist on tile parallelization in HEVC. In this paper we tackle the problem of balancing the CPU core load by dynamically adapting tile sizes. It is shown that the proposed adaptive method leads to significant reduction of load imbalances and consequently, achieves a better speedup compared to static, uniform CTU-tile assignment. Furthermore, these gains come at no cost quality wise.

WEVIAN: A Web-based Placement Visualizer / Analyzer

One of the most important stages of a typical ASIC (Application-specific integrated circuit) design flow, is physical design. The most prominent step of the aforementioned stage is placement. Major design challenges are regulated while traversing this stage in order to accommodate the final sign-off. Various aspects of the design might be modified during this step, and the primary manner to keep track of these modifications is usually through detailed text reports, concerning universal metrics like density and wire-length, and generic static visualizations, due to the timing overhead it introduces to the overall procedure. However, a detailed and interactive depiction of the final result might provide insights concerning the quality of the final solution and the effectiveness of the applied algorithms. In this paper we present WEVIAN, a web-based placement visualizer/analyzer that enhances the design procedure by adding interactivity and offloading part of the workload to a third-party server.

SCIZER: A scalable placement visualizer/analyzer

The major design challenges of ASIC design, like power dissipation, timing, voltage-drop, interconnect and reliability are tackled during the Physical Design phase of any flow. The placement procedure can significantly modify parts of the design and consequently metrics relevant to the aforementioned challenges. Text reports cannot always generate useful insight based solely on these metrics. Design visualization can be of utmost importance in deciding if the placement strategy followed is leading to fruition. In this paper we present a placement visualizer/analyzer that helps capture the most critical aspects of a placed design and empowers the user to draw safer conclusions concerning the quality of the final result.

Enhanced Tetris Legalization

Legalization and detailed placement methods for standard cell designs, are two of the most notable topics in current VLSI research. Being the final steps in a classic placement procedure they must be efficient in terms of the delay overhead they introduce to the overall design flow and the quality of the final solution. In this paper we present a combined solution of the aforementioned steps, based on Tetris a particular simple and fast legalization algorithm, that produces considerable results taking into account the tradeoff between total wirelength, total cell displacement and runtime.