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Dive into the research topics where Arvind Halliyal is active.

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Featured researches published by Arvind Halliyal.


international electron devices meeting | 2002

Quantum-well memory device (QWMD) with extremely good charge retention

Zoran Krivokapic; T. Krishnamohan; Arvind Halliyal; A. Jafarpour; S. Cherian; A. Holbrook; W. Zheng; A. Randolph; Ming-Ren Lin

We propose and demonstrate a new device that utilizes a quantum well (its dimensions determined by two self-limiting processes) as a floating gate. We show that fast programming and erasing can be achieved. Excellent charge retention (ten years) is obtained, for 2.7 nm thin tunneling oxide, at room temperature, and for 5 nm thin tunneling oxide even at elevated temperature.


Journal of The Electrochemical Society | 2003

Optical Analyses (SE and ATR) and Other Properties of LPCVD Si3 N 4 Thin Films

Yun Wu; Huicai Zhong; Jeremias D. Romero; Cyrus E. Tabery; Cristina Cheung; Brian J. MacDonald; Jay Bhakta; Arvind Halliyal; Fred T K Cheung; Robert B. Ogle

Thin silicon nitride films (less than 20 nm) deposited on (100) silicon substrates via low pressure chemical vapor deposition (LPCVD) at three temperatures (730, 760, and 825°C) were analyzed by spectroscopic ellipsometry (SE), attenuated total reflection (ATR), and other tools. Films appeared to have similar optical bandgaps (∼5 eV). and the values decreased slightly with the higher deposition temperature. Second ionic mass spectroscopy results showed that a similar amount of oxygen exists in the interface between silicon and silicon nitride. ATR spectra showed no sign of Si-H bonds and decreasing N-H bonds at higher deposition temperature in the thin films. The electrical properties of the films are also discussed.


Archive | 2001

Use of high-K dielectric material in modified ONO structure for semiconductor devices

Arvind Halliyal; Mark T. Ramsbey; Kuo-Tung Chang; Nicholas H. Tripsas; Robert B. Ogle


Archive | 2002

Preparation of composite high-K/standard-K dielectrics for semiconductor devices

Arvind Halliyal; Joong S. Jeon; Minh Van Ngo; Robert B. Ogle


Archive | 2002

Integrated process for fabrication of graded composite dielectric material layers for semiconductor devices

Joong S. Jeon; Arvind Halliyal


Archive | 2002

Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material

Arvind Halliyal; Robert B. Ogle; Joong S. Jeon; Fred T K Cheung; Effiong Ibok


Archive | 2002

Precision high-K intergate dielectric layer

Fred T K Cheung; Arvind Halliyal


Archive | 2003

Process for reducing hydrogen contamination in dielectric materials in memory devices

Hidehiko Shiraiwa; Jaeyong Park; Fred T K Cheung; Arvind Halliyal


Archive | 1999

High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device

Arvind Halliyal; Robert B. Ogle; Hideki Komori; Kenneth Wo-Wai Au


Archive | 2002

Integrated process for depositing layer of high-K dielectric with in-situ control of K value and thickness of high-K dielectric layer

Arvind Halliyal; Farzad Arsania

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