Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Ashish R. Jain is active.

Publication


Featured researches published by Ashish R. Jain.


international solid-state circuits conference | 2008

An All-Digital On-Chip Process-Control Monitor for Process-Variability Measurements

Fabian Klass; Ashish R. Jain; Greg M. Hess; Brian Park

Process variability has become a major challenge in nanometer technologies. Understanding process variability is therefore a key to designing successful low-power multi-million gate SoCs. An all-digital on-chip process control-monitor (PCM) that measures process variability is described.


international conference on ic design and technology | 2009

An on-chip process control monitor for process variability measurements in nanometer technologies

Fabian Klass; Ashish R. Jain; Greg M. Hess

Process variability has become a fundamental challenge in nanometer technologies. This trend is driven by Moores law, which governs the exponential growth of transistors in ICs, the low-power requirements of mobile devices (i.e., Vdd ≪ 1V), and the shrinking geometries of advanced technologies reaching the sub-nanometer dimensions. Understanding process variability is therefore key to successfully designing ultra low-power multi-million gate SoCs. An all-digital on-chip process control-monitor (PCM) that measures process variability is described. It is implemented in a 65nm dual-oxide triple-Vt bulk CMOS process and it measures 0.41mm2.


Archive | 2009

Mechanism for measuring read current variability of SRAM cells

Ashish R. Jain; Priya Ananthanarayanan; Greg M. Hess; Edgardo F. Klass


Archive | 2009

Apparatus and method for testing sense amplifier thresholds on an integrated circuit

Ashish R. Jain; Edgardo F. Klass


Archive | 2006

Digital jitter detector

Greg M. Hess; Edgardo F. Klass; Andrew J. Demas; Ashish R. Jain


Archive | 2005

Digital leakage detector that detects transistor leakage current in an integrated circuit

Edgardo F. Klass; Andrew J. Demas; Greg M. Hess; Ashish R. Jain


Archive | 2010

Pulse flop with enhanced scan implementation

Edgardo F. Klass; Ashish R. Jain


Archive | 2005

Digital leakage detector

Edgardo F. Klass; Andrew J. Demas; Greg M. Hess; Ashish R. Jain


Archive | 2015

Reliability guardband compensation

Antonietta Oliva; John G. Dorsey; Keith Cox; Norman J. Rohrer; Sribalan Santhanam; Sung Wook Kang; Mohamed H. Abu-Rama; Ashish R. Jain


Archive | 2012

APPARATUS AND METHOD FOR TESTING DRIVER WRITEABILITY STRENGTH ON AN INTEGRATED CIRCUIT

Ashish R. Jain; Edgardo F. Klass

Collaboration


Dive into the Ashish R. Jain's collaboration.

Researchain Logo
Decentralizing Knowledge