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Dive into the research topics where Atsushi Kamo is active.

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Featured researches published by Atsushi Kamo.


IEEE Transactions on Microwave Theory and Techniques | 2001

A synthesis technique of time-domain interconnect models by MIMO type of selective orthogonal least-square method

Masaya Suzuki; Hirofumi Miyashita; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

This paper describes an efficient synthesis technique of time-domain models for interconnects characterized by sampled data. In this method, poles are derived from the sampled data in the frequency domain. Next, the dominant poles and the residues are obtained efficiently by multiinput-multioutput type of selective orthogonal least-square method. Furthermore, time-domain models are derived from the frequency-domain models. Finally, the accuracy and efficiency of the proposed method are substantiated by transient simulation of example circuits using this model.


electrical performance of electronic packaging | 2000

An optimization method for placement of decoupling capacitors on printed circuit board

Atsushi Kamo; Takayuki Watanabe; Hideki Asai

This paper investigates the optimal placement of decoupling capacitors on printed circuit boards (PCB). This method minimizes the impedance characteristics at the power supply in the specified frequency range in order to find the optimal decoupling capacitor position. In this method, the PCB is modeled via the partial element equivalent circuit (PEEC) model approach to handle the 3D structures, and the Krylov-subspace technique is used to obtain the impedance characteristics in the frequency domain efficiently.


electrical performance of electronic packaging | 2002

A searching method for optimal locations of decoupling capacitors based on electromagnetic field analysis by FDTD method

I. Hattori; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

This paper describes a searching method for positions of decoupling capacitors on the printed circuit board (PCB). In this method, first, the distributions of electromagnetic field between power and ground planes in the time domain are simulated, using FDTD method. Next, the distribution of Poynting vectors in the frequency domain is investigated, using fast Fourier transforms (FFT). Furthermore, this method finds the optimal location of decoupling capacitor so that the Poynting vector is the highest.


international symposium on circuits and systems | 2002

Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method

I. Hattori; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

This paper describes the searching method for positions of decoupling capacitors on the printed circuit board (PCB). In this method, first, the distributions of electromagnetic field between power and ground planes in the time domain are simulated, using FDTD method. Next, the distribution of Poynting vectors in the frequency domain is investigated, using fast Fourier transform (FFT). Furthermore, this method finds the optimal location of decoupling capacitor so that the Poynting vector is the highest. Finally, we analyze the distribution of magnetic field emission above the signal plane in the x and y axes in the specified range of frequency and verify the validity of our method.


electrical performance of electronic packaging | 2001

Analysis of power/ground planes by PCB simulator with model order reduction technique

Hidemasa Kubota; Atsushi Kamo; Talcam Watanabe; Hideki Asai

With the progress of integration of circuits and PCBs (printed circuit boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain interconnects with nonlinear terminations. This simulator is based on the ASSIST environmental tool constructed for development of the circuit simulators, and is combined with PRIMA (passive reduced-order interconnect macromodeling algorithm). In this simulator, an efficient implementation of PRIMA is considered with use of a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of simple PCBs, and the validity is verified.


design, automation, and test in europe | 2004

Hybrid reduction technique for efficient simulation of linear/nonlinear mixed circuits

Takashi Mine; Hidemasa Kubota; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

In this paper, we propose a new method which makes transient simulation faster for the circuit including both nonlinear and linear elements. First, the method for generating the projection matrix with krylov-subspace technique is described. The order of the circuit equation is reduced by congruence transformation with the projection matrix. Next, we suggest a method which can calculate the reduced Jacobian matrix directly in the each Newton-Raphson iteration. Since this technique does not need to calculate the original size of Jacobian matrix, the calculation cost is reduced drastically. Therefore, efficient circuit simulation can be achieved. Finally, our method is applied to some example circuits: and the validity of the nonlinear circuit reduction technique is verified.


electrical performance of electronic packaging | 2000

A synthesis technique of time-domain interconnect models by MIMO type of adaptive least square method

Masaya Suzuki; Hirofumi Miyashita; Atsushi Kamo; Toshio Watanabe; Hideki Asai

This paper describes an efficient synthesis technique of time-domain models for interconnects characterized by sampled data. In this method, poles are derived from sampled data in the frequency domain. Next, the dominant poles and the residues are obtained efficiently by a MIMO (multi-input multi-output) type of adaptive least squares method. Furthermore, time-domain models are derived from the frequency domain models. Finally, the accuracy and efficiency of the proposed method are substantiated by transient simulation of an example circuit using this model.


international symposium on circuits and systems | 2001

Simulation for the optimal placement of decoupling capacitors on printed circuit board

Atsushi Kamo; Takayuki Watanabe; A. Asai

This paper describes a method for the optimal placement of the decoupling capacitors on the printed circuit board (PCB). This method searches the optimal position of decoupling capacitor so that the impedance characteristics at the power supply is minimized in the specified frequency range. In this method, the PCB is modeled by the PEEC method to handle the 3-dimensional structures and the Krylov-subspace technique is applied to obtain efficiently the impedance characteristics in the frequency domain.


electrical performance of electronic packaging | 2001

An alternating implicit block overlapped FDTD (AIBO-FDTD) method and its estimation with parallel computation

P. Pongpaibool; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

The finite-difference time-domain (FDTD) method has been widely used for solving various types of electromagnetic problems such as anisotropic and nonlinear problems. The FDTD method provides accurate predictions of field behaviors. In this paper, a new algorithm for two-dimensional (2-D) finite-different time-domain (FDTD) is presented in order to increase the maximum time step size and reduce the simulation time by simulating in parallel computation.


midwest symposium on circuits and systems | 2000

An application of Verilog-A to modeling of back propagation algorithm in neural networks

Kenichi Suzuki; Akinobu Nishio; Atsushi Kamo; Takayuki Watanabe; Hideki Asai

This paper describes an application of the Verilog-A, which is a hardware description language for analog applications, to the modeling of neural networks. We attempt to simulate neural networks having a learning algorithm, which has not been designed with electronic circuits. The learning algorithm is modeled with Verilog-A and the suitable synaptic weights are solved by Verilog-A simulation.

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