Austin H. Roach

Electron-Induced Single-Event Upsets in 45-nm and 28-nm Bulk CMOS SRAM-Based FPGAs Operating at Nominal Voltage

Electron-induced single-event upsets (SEUs) are observed in 45-nm and 28-nm bulk complementary metal-oxide semiconductor static random-access memory-based field-programmable gate arrays (FPGAs) operating at nominal voltage at a 20-MeV electron LINAC facility. Upsets are recorded in the embedded random-access memory (RAM) and configuration RAM of the FPGAs. This paper is the first to show electron-induced SEUs in a commercial-off-the-shelf device operating at nominal voltage. The measured electron-induced SEU cross sections are between 10 - 18 and 10 - 17 cm2/bit depending on the device and memory cell tested. Monte Carlo simulations show that the upsets are due to rare indirect ionization events.

Interrupted PROGRAM and ERASE Operations for Characterizing Radiation Effects in Commercial NAND Flash Memories

A technique of interrupting PROGRAM and ERASE operations is used to extract information about the analog characteristics of commercial NAND Flash memory cells. The number of interrupted PROGRAM or ERASE operations required to cause a bit to change state is shown to be modified by program/erase stress, total ionizing dose, and heavy ion exposure. These modifications allow for the detection of stresses far below the thresholds for memory cell failure.

Characterizing Radiation and Stress-Induced Degradation in an Embedded Split-Gate NOR Flash Memory

Radiation and stress-induced degradation are characterized in split-gate NOR flash cells through a set of unique experiments. Radiation and program/erase stress on the bit cells is shown to create both positive and negative traps in the oxide around the floating gate cell. The annealing temperature following radiation determines the rate at which oxide traps are neutralized. To analyze both program/erase and radiation induced damage in greater detail; partial program and erase operations are performed. The implications of this work for both radiation hardness assurance testing and device reliability are discussed.

Low-Energy Electron Irradiation of NAND Flash Memories

Data on NAND Flash memories exposed to electrons with energies ranging from 20 keV to 100 keV are presented. When the memories are exposed to electrons below 100 keV, the total-dose induced data corruption is significantly greater than when tested to the same total dose in a Co-60 source due to dose enhancement effects. In addition, even in an extremely radiation soft NAND flash, no electron-induced single-event upsets were observed in this work.

Single Event Effects in 14-Nm Intel Microprocessors

Heavy ion and proton test results on multiple commercial 14-nm Intel microprocessors are presented. Testing was performed using commercial motherboards with a mixture of commercial and custom software. Machine check errors, system crashes, graphical glitches, and isolated events with temporary or permanent loss of functionality referred to as hard failures were observed during testing. The hard failures observed while testing the Intel 5th Generation Broadwell 14-nm devices were caused by a companion 32-nm planar bulk CMOS die in the multi-chip package.

Alpha-particle and neutron-induced single-event transient measurements in subthreshold circuits

Experimental data from alpha particle, neutron, and heavy ion testing are discussed and analyzed from a sub-threshold voltage SET characterization circuit. Using a Schmitt trigger inverter target chain fabricated in a 28-nm bulk CMOS process, SET pulse widths are captured from an operating voltage down to 0.32 V. These results show that energetic particles can induce SET pulse widths that range up to hundreds of nanoseconds when operating at voltages well below the nominal voltage. Additionally, the results show that sub-Vt circuits are significantly more susceptible, as compared to circuits operating at nominal voltages, to low-energy particles inducing SETs that have a high probability of being latched as errors in a combinatorial logic design.

Total ionizing dose effects in commercial floating-gate-alternative non-volatile memories

The total dose response of commercially-available floating-gate-alternative non-volatile memories is characterized. The response of MRAM, FRAM, CBRAM, ReRAM, SONOS, and PCRAM devices are compared to a relatively radiation tolerant NAND flash.

Characterization of Single-Event Transients in Schmitt Trigger Inverter Chains Operating at Subthreshold Voltages

Single-event transients (SETs) induced by alpha particles and heavy ions are measured and analyzed with subthreshold voltage SET characterization circuits. Using a Schmitt trigger inverter target chain fabricated in a 65-nm bulk CMOS process, SET pulse widths are captured from an operating voltage down to 0.32 V. At nominal voltages, the Schmitt trigger inverter chain is immune to SETs, but at subthreshold voltages energetic particles can induce SET pulse widths that range up to and over a microsecond. Additionally, the results show that at subthreshold voltages the 28-nm node offers a significant improvement in the SET response over the 65-nm node.