Axel Flament

An All-Digital RF Signal Generator Using High-Speed

An all-digital RF signal generator using DeltaSigma modulation and targeted at transmitters for mobile communication terminals has been implemented in 90 nm CMOS. Techniques such as redundant logic and non-exact quantization allow operation at up to 4 GHz sample rate, providing a 50 MHz bandwidth at a 1 GHz center frequency. The peak output power into a 100 Omega diff. load is 3.1 dBm with 53.6 dB SNDR. By adjusting the sample rate, carriers from 50 MHz to 1 GHz can be synthesized. RF signals up to 3 GHz can be synthesized when using the first image band. As an example, UMTS standard can be addressed by using a 2.6 GHz clock frequency. The measured ACPR is then 44 dB for a 5 MHz WCDMA channel at 1.95 GHz with output power of -16 dBm and 3.4% EVM. At 4 GHz clock frequency the total power consumption is 120 mW (49 mW for DeltaSigma modulator core) on a 1 V supply voltage, total die area is 3.2 mm2 (0.15 mm2 for the active area).

\Delta\Sigma

This paper presents a very high-speed delta-sigma modulator for achieving digital generation of radio-frequency signals. About 68 dB of ACLR (adjacent channel leakage ratio) is obtained on the 7.8 GS/s output of the delta-sigma modulator for WCDMA standard. This is achieved by using original concepts like borrow-save arithmetic, non-exact quantization and differential dynamic logic.

Modulators

This paper presents a reconfigurable semi-digital RFFIR filter suitable for digital transmitters using 1-bit DeltaSigma signal generation. A transmission line based 5-channel power combiner allows both increase of output power and programmable filtering of the signal. A prototype has been built with 65 nm CMOS and Integrated Passive Devices (IPD) technologies. The system exhibits a 14 dB power gain for a peak power of 17 dBm at 1.2 GHz and an attenuation of out-of band noise of up to 15 dB. CMOS and IPD chip size are respectively 2.05 mm2 and 17.78 mm2.

Design techniques for very high speed digital delta-sigma modulators aimed at all-digital RE transmitters

Digital generation of radio-frequency signals is a key concept of software defined radios. This paper presents a digital transmitter chain including a very high-speed delta-sigma modulator. It comprises also baseband processing, sample rate conversion, digital upconverter and output stages (switching- mode amplifier and BAW filters). About 74 dB of ACLR (adjacent channel leakage ratio) is obtained on the 7.8 GS/s output of the delta-sigma modulator for the WCDMA standard.

A 1.2 GHz semi-digital reconfigurable FIR bandpass filter with passive power combiner

The presented digital RF signal generator in 90 nm CMOS uses 1-bit DeltaSigma modulation and targets mobile communication terminals. A 50 MHz bandwidth centered on 1 GHz can be achieved when the circuit is clocked at 4 GHz. Signals up to 3 GHz can be synthesized when using the first image band. The peak output power into a 100 Omega diff. load is 3.1 dBm with 53.6 dB SNDR. The digital core employs redundant arithmetic, precomputed non-exact quantization and differential dynamic logic. The digital core consumes 49 mW at maximum clock frequency. Active area is 0.15 mm2.

All-digital RF signal generation for software defined radio

Digital generation of radio-frequency signals is a key concept of software defined radio. One of the main difficulties for multi-standard transmitter design based on delta-sigma (DeltaSigma) modulators is to respect the different specifications in terms of out-of-band spurious emission. Focusing on the TX path of a UMTS/DCS1800 mobile phone, we propose hereinafter an efficient method aiming at synthesizing a complex 5th-order DeltaSigma modulator which respects the targeted standards spurious specifications. The use of a complex noise transfer function allows a better optimization of noise shaping. In addition, this approach eases the reconfiguration of the modulator, and, it is a powerful tool for all order (real and complex) DeltaSigma modulators synthesis, as it will be illustrated.

A digital ΔΣ RF signal generator for mobile communication transmitters in 90nm CMOS

© 2013 Chatras et al., licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Modeling and Design of BAW Resonators and Filters for Integration in a UMTS Transmitter

Reconfigurable complex digital Delta-Sigma modulator synthesis for digital wireless transmitters

A differential digital to 60 GHz quadrature mixer on a 65 nm SOI CMOS process from STMicroelectronics has been designed. Two 5 GS/s 4-bit quadrature base band signals are fully decoded and fed into an unary-weighted current DAC. The DAC output is fed to two RF Gilbert cell mixers driven by an off-chip 60 GHz LO signal. The simulated P1dB output power is −22.5 dBm for an LO power of −2 dBm at 60 GHz for a 6 mA current consumption at 1.2 V. The chip size is 1.54 × 2.6 mm2.

Modeling and Design of BAW Resonators and Filters for Integration in a UMTS Transmitter

This paper presents the first demonstration of a complete CMOS 90nm digital RF signal generator for wireless communication systems including a BAW (Bulk Acoustic Wave) based filter. A 1-bit delta-sigma signal generator is assembled with a BAW band pass filter for the UMTS TX-band at 1.95GHz. The system satisfies UMTS specifications for ACPR and spurious emissions as defined in the IST MOBILIS project. The CMOS and BAW chip sizes are respectively 3.2mm² and 4.7mm².