Ayaki Takeda

First Performance Evaluation of an X-Ray SOI Pixel Sensor for Imaging Spectroscopy and Intra-Pixel Trigger

We have been developing a monolithic active pixel sensor with the 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, called SOIPIX, for the wide-band X-ray imaging spectroscopy on future astronomical satellites. SOIPIX includes a thin CMOS-readout-array layer and a thick high-resistivity Si-sensor layer stacked vertically on a single chip. This arrangement allows for fast and intelligent readout circuitries on-chip, providing advantages over the charge-coupled device (CCD). We have designed and built a new SOIPIX prototype XRPIX1 for X-ray detection. XRPIX1 implements a correlated double sampling (CDS) readout circuit in each pixel to suppress the reset noise. We obtained an energy resolution of full width at half maximum of 1.2 keV (5.4%) at 22 keV with a chip having a 147 μm sensor depletion at a back bias of 100 V cooled to -50°C. Moreover, XRPIX1 offers intra-pixel hit trigger (timing) and two-dimensional hit-pattern (position) outputs. We also confirmed the trigger capability by irradiating a single pixel with laser light.

Design and Evaluation of an SOI Pixel Sensor for Trigger-Driven X-Ray Readout

We have been developing a monolithic active pixel sensor with the silicon-on-insulator (SOI) CMOS technology for use in future X-ray astronomical satellite missions. This sensor is called XRPIX. Our objective is to replace the X-ray CCD, which is currently the standard detector in the field, with the developed XRPIX, which offers high coincidence time resolution (~ 50 ns), superior hit-position readout time (~ 10 μs), and wide bandpass (0.5-40 keV), in addition to having comparable performance in terms of imaging spectroscopy. In our previous study, we built a prototype sensor called XRPIX1 and confirmed its basic X-ray imaging spectroscopy performance in a mode that read out the entire area (all pixels). The next step is to realize a high-speed, intelligent readout for X-ray detection. XRPIX1 comprises a trigger circuit for each pixel, so as to detect an X-ray photon injection; this system is capable of direct access to selected pixels to read out the signal amplitude. We describe the design of the trigger circuitry system and report on the first resolved X-ray spectra obtained in the trigger-driven readout mode.

Development and performance of Kyoto's x-ray astronomical SOI pixel (SOIPIX) sensor

We have been developing monolithic active pixel sensors, known as Kyoto’s X-ray SOIPIXs, based on the CMOS SOI (silicon-on-insulator) technology for next-generation X-ray astronomy satellites. The event trigger output function implemented in each pixel offers microsecond time resolution and enables reduction of the non-X-ray background that dominates the high X-ray energy band above 5–10 keV. A fully depleted SOI with a thick depletion layer and back illumination offers wide band coverage of 0.3–40 keV. Here, we report recent progress in the X-ray SOIPIX development. In this study, we achieved an energy resolution of 300 eV (FWHM) at 6 keV and a read-out noise of 33 e- (rms) in the frame readout mode, which allows us to clearly resolve Mn-Kα and Kβ. Moreover, we produced a fully depleted layer with a thickness of 500 μm. The event-driven readout mode has already been successfully demonstrated.

Development of FD-SOI monolithic pixel devices for high-energy charged particle detection

Monolithic pixel devices fabricated with a siliconon-Insulator (SOI) technology are excellent candidates to realize particle detectors of fast response and least material yet simple in fabrication. In our SOI pixel devices the sensitive part is the “handle” wafer, to which we examined high resistive FZ wafers of both p- and n-types together with CZ wafer of n-type. Full depletion of the FZ wafers is easily achievable for typical thicknesses of 260 to 500 µm. We thinned these devices to 100 to 50 µm. The response was evaluated with infrared and red lasers, and in a high energy beam. Irradiation to 60Co γ was carried out to verify the radiation tolerance of the devices.

Development and Evaluation of Event-Driven SOI Pixel Detector for X-ray Astronomy

Ayaki Takeda∗a, Takeshi Go Tsurua, Takaaki Tanakaa, Hideaki Matsumuraa, Yasuo Araib, Koji Moric, Yusuke Nishiokac, Ryota Takenakac, Takayoshi Kohmurad , Shinya Nakashimae, Shoji Kawahito f , Keiichiro Kagawa f , Keita Yasutomi f , Hiroki Kamehama f and Sumeet Shrestha f aDepartment of Physics, Faculty of Science, Kyoto University bInstitute of Particle and Nuclear Studies (IPNS), High Energy Accelerator Research Organization (KEK) cDepartment of Applied Physics, Faculty of Engineering, University of Miyazaki dDepartment of Physics, School of Science and Technology, Tokyo University of Science eJapan Aerospace Exploration Agency (JAXA) fResearch Institute of Electronics, Shizuoka University

Tests With Soft X-rays of an Improved Monolithic SOI Active Pixel Sensor

We have been developing monolithic active pixel sensors with 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, called SOIPIX, for high-speed wide-band X-ray imaging spectroscopy on future astronomical satellites. In this work, we investigate a revised chip (XRPIX1b) for soft X-rays used in frontside illumination. The Al Kα line at 1.5 keV is successfully detected and energy resolution of 188 eV (FWHM) is achieved from a single pixel at this energy. The responsivity is improved to 6 μV/electron and the readout noise is 18 electrons rms. Data from 3 ×3 pixels irradiated with 6.4 keV (Fe Kα) X-rays demonstrates that the circuitry crosstalk between adjacent pixels is less than 0.5%.

Characterization of high resolution CMOS monolithic active pixel detector in SOI technology

Novel CMOS monolithic pixel detectors designed at KEK and fabricated at Lapis Semiconductor in 0.2 μm Silicon-on-Insulator (SOI) technology are presented. A thin layer of silicon oxide separates high and low resistivity silicon layers, allowing for optimization of design of detector and readout parts. Shallow wells buried under the oxide in the detector part screen the entire pixel electronics from electrical field applied to the detector. Several integration type SOI pixel detectors have been developed with pixel sizes 8–20 μm. The general features of 14 × 14 μm2 detectors designed on different wafers (CZ-n, FZ-n and FZ-p) were measured and compared. The detector performance was studied under irradiation with visible and infra-red laser, and also X-ray ionizing source. Using X-rays from an Am-241 source the noise of readout electronics was measured at different working conditions, showing the ENC in the range of 88–120 e−. The pixel current was calculated from average DC pedestal shift while varying the pixel integration time. The operation of the detector was studied under partial and full depletion conditions. The effects of temperature and detector bias voltage on noise and leakage current were studied. Characteristics of an ADC integrated in the front-end chip are also presented.

SOI monolithic pixel detector

We are developing monolithic pixel detector using fully-depleted (FD) silicon-on-insulator (SOI) pixel process technology. The SOI substrate is high resistivity silicon with p-n junctions and another layer is a low resistivity silicon for SOI-CMOS circuitry. Tungsten vias are used for the connection between two silicons. Since flip-chip bump bonding process is not used, high sensor gain in a small pixel area can be obtained. In 2010 and 2011, high-resolution integration-type SOI pixel sensors, DIPIX and INTPIX5, have been developed. The characterizations by evaluating pixel-to-pixel crosstalk, quantum efficiency (QE), dark noise, and energy resolution were done. A phase-contrast imaging was demonstrated using the INTPIX5 pixel sensor for an X-ray application. The current issues and future prospect are also discussed.

A Low-Noise X-ray Astronomical Silicon-On-Insulator Pixel Detector Using a Pinned Depleted Diode Structure

This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO2 interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e−rms, low dark current density of 56 pA/cm2 at −35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV.

Performance study of monolithic pixel detectors fabricated with FD-SOI technology

We are developing monolithic pixel detectors with a 0.2 µm CMOS, fully-depleted silicon-on-insulator (SOI) technology. The substrate is high-resistivity silicon and works as a radiation sensor having p-n junctions. The SOI layer is a 40 nm thick silicon, where readout electronics is implemented. There is a buried oxide (BOX) layer between these silicon layers. We have already done several Multi Project Wafer (MPW) runs by gathering many pixel designs into a photo mask set, and as the results, several types of integration type pixel detectors (INTPIX) were fabricated. In this document, the design concept and performance in some of INTPIX detectors are described.