Ayantika Chatterjee

Design of a high performance Binary Edwards Curve based processor secured against side channel analysis

Elliptic curve cryptography (ECC) is in prime focus in the domain of public-key cryptography (PKC) due to its advantage over RSA with smaller bit requirement. Still, this curve has some major issues in terms of unifiedness and completeness. In 2007, Edwards curve has proved to be the answer to such deficiencies with its unified addition law. This curve has been recently extended to Binary Edwards Curves (BEC), due to efficiency of implementation in GF(2^m) fields and to harvest the advantages of a unified and complete scalar point multiplication on the family of BEC. In spite of achieving the unification, it introduces more challenges to the designer to reduce the computation time and trade-off the area in efficient way. A noble architecture of a BEC processor is proposed in this work in GF(2^2^3^3). We further analyze the work in terms of simple power analysis. Through experimentations, we show that the naive implementation can reveal some important information about the secret key. Finally, we conclude the work with suitable modifications to prevent such side-channel attacks.

Accelerating Sorting of Fully Homomorphic Encrypted Data

Sorting is an age old problem in Computer Science. Recently with the advent of cloud computing this problem is revisited on encrypted data. This paper tries to evaluate the possibility of applying the recently discovered Fully Homomorphic Encryption schemes to sort encrypted text. The paper first develops fully homomorphic circuits for performing comparison based swaps and then employs them to realize conventional sorting algorithms. Since the sorting time grows exponentially with the input size, it is required to propose suitable measures to reduce it; the delay occuring due to the costly Recrypt operation which removes the noise in the Homomorphic computations. The paper then investigates the opportunity of reducing Recrypt by experimenting on the average errors introduced due to wrong comparisons, which arise due to the removal of the de-noising step. Results show that suitably choosing the number of Recrypt operations results in an almost sorted array. This motivates to develop a two-stage sorting called LazySort: the first phase performing a Bubble sort with reduced Recrypt operations to result in an almost sorted array, to be followed by a second stage which employs an Insertion sort with all Recrypt operations. Detailed experiments show that helps to obtain a significant speed up in the sorting time.

FPGA implementation of binary edwards curve usingternary representation

Elliptic curve cryptography (ECC) has proven its superiority, since it was proposed in the domain of Public-Key Cryptography [1]. Further, Edwards curve adds a new paradigm to ECC in terms of speed and security against exceptional point attacks. This curve has been recently extended to Binary Edwards Curves (BEC), due to efficiency of implementation in GF(2m) fields and to harvest the advantages of a unified and complete scalar point multiplication on the family of BEC. In spite of achieving the unification, it introduces more challenges to the designer to reduce the computation time and trade-off the area in efficient way. This work reports an implementation of BEC processor with an effort to better utilize the look-up table (LUT) of the FPGA. The design further implements the ternary algorithm to increase the efficiency. However, to the best of our knowledge there exists no previous implementations of BEC on FPGA platform. The proposed design has been implemented for state-of-the-art GF(2233) fields. The performance of the design has been found to compare favorably with the existing designs on standard cell ASIC libraries, in spite of being implemented on FPGA platform.

High-Speed unified elliptic curve cryptosystem on FPGAs using binary huff curves

Conventional Elliptic Curve (EC) cryptosystems are subjected to side channel attacks because of their lack of unifiedness. On the other hand, unified cryptosystems based on Edwards curves have been found to be slow. The present paper proposes the first VLSI design of binary Huff curves, which also lead to unified scalar multiplication. Several optimized architectural features have been developed to utilize the FPGA resources better, and yet lead to a faster circuit. Experimental results have been presented on the standard NIST curves, and on state-of-the-art GF(2233) to show that the design is significantly faster than other unified EC cryptosystems.

FPGA implementation of extended reconfigurable Binary Edwards Curve based processor

Elliptic Curve Cryptosystem (ECC) is the next generation public key ciphers for securing communications. However, due to its inherent complex mathematical nature, it poses challenges to designers. In this paper, we present a Field Programmable Gate Array (FPGA) design of scalar multiplication on Binary Edwards Curve (BEC) for state of the art field of GF(2233). The work contributes to develop shared data and control paths for the processor, to support two important curve operations, namely point halving and doubling based scalar multiplication. Such a unified design has the advantage of reduction in hardware and yet supporting both these important operations. To the best of our knowledge, this is the first reported design of a BEC based processor which supports both point halving and doubling. Detailed experimental results are provided to show that with minimal overhead the design can perform both point doubling and halving based scalar multiplications.

Translating Algorithms to Handle Fully Homomorphic Encrypted Data on the Cloud

Cloud provides large shared resources where users (or foundations) can enjoy the facility of storing data or executing applications. In spite of gaining convenience of large resources, storing critical data in cloud is not secured. Hence, cloud security is an important issue to make cloud useful at the enterprise level. Data encryption is a primary solution for providing confidentiality to sensitive data. However, processing of encrypted data requires extra overhead, since repeated encryption-decryption need to be performed for every simple processing on encrypted data. Hence, direct processing on encrypted cloud data is advantageous, which is supported by homomorphic encryption schemes. Fully Homomorphic Encryption (FHE) provides a method of performing arbitrary operations directly on encrypted data. This seemingly magical idea is a welcome to cloud computing. However, there are several challenges to overcome for making the technology viable in practical applications. In this paper, we make an initial effort to highlight the problem of translating algorithms that can run on unencrypted or normal data to those which operate on encrypted data. Here, we show that although FHE provides the ability to perform arbitrary computations, its complete benefit can only be obtained if they also allow to execute arbitrary algorithms on encrypted data. In this pursuit, we provide techniques to translate basic operators (like bitwise, arithmetic and relational operators), which are used for implementation of algorithms in any high level language like C. Subsequently, we address decision making and loop handling and related data structures which are vital to realize when the controlling variables are encrypted. Since, termination is a major challenge while handling encrypted data, we propose a method of handling termination by message passing between server and client.

Performance Modelling and Acceleration of Binary Edwards Curve Processor on FPGAs

Binary Edwards Curve has evolved as an alternative to conventional elliptic curve cryptography which is prone to operational point attacks. However, comparatively slower uni ed scalar multiplication algorithm of this curve poses design challenges to hardware designers. FPGA, as opposed to ASICs due to their speci clook-up-table based underlying architecture, provides unique challenges and opportunities for the design of such complex circuits. In this work, as opposed to an ad-hoc design methodology, we focus on developing an e cient architecture for scalar multiplication on binary Edwards curve in an analytical fashion. The method rstidenties the tunable parameters of the architecture, followed by developing analytical estimates of the resources used and the critical path delay of the circuit in terms of the design parameters and the FPGA characteristics. Detailed analytical and experimental results have been provided to show that the model indeed helps to develop an architecture with improved effciency with respect to other reported results on similar platform.

Windowing technique for Lazy Sorting of Encrypted data

In computer science literature, sorting is an age-old theoretically interesting problem with great practical importance. In this paper, we discuss the effect on sorting when the comparisons are erroneous. Such an analysis would be in particular effective for secured cloud data which is Fully Homomorphically Encrypted (FHE) and the sorting is intended to be applied on the encrypted data. Although theoretically feasible, FHE is costly due to the underlying Recrypt operation, removal of which leads to erroneous computations. In this context, we consider a two-stage sorting called Lazysort. In this sort, the first phase is a layer of Bubble sort with reduced Recrypts, thus leading to erroneous comparisons. We provide analysis to show the effect of this error on the eventual window in which the correct location of an element lies. Assuming such a window in which the probability of an element to lie is almost one, we apply a second pass of insertion sort, which has an linear complexity for an almost sorted array. In this paper, we discuss about practical challenges of implementing such encrypted sorting while working with underlying encrypted processor. Finally, we show how our proposed method makes this sorting technique actually feasible and provide practical results to accompany the theoretical claims made to justify the windowed technique for implementing the LazySort algorithm on FHE data.