Bablu K. Ghosh

Reduced-stress GaN epitaxial layers grown on Si(1 1 1) by using a porous GaN interlayer converted from GaAs

This paper reports the reduced-stress GaN epitaxial growth on Si (1 1 1) using a porous GaN interlayer which is formed from GaAs layer by a novel nitridation process. Initially a 2 μm thick GaAs layer is grown on a Si(1 1 1) substrate by MBE. Then, a GaN buffer layer of 20 nm thick is grown on the GaAs layer at 550°C in a MOVPE reactor. The GaAs layer capped with the GaN buffer layer is annealed in NH3 to 1000°C. Through this process, a porous GaN layer is formed beneath the GaN cap layer. An epitaxial GaN layer is grown on the GaN buffer layer at 1000°C in the MOVPE reactor. The epitaxial layer grown on the porous-GaN/Si(1 1 1) structure is found to have no cracks on the surface. In contrast, an epitaxial layer grown on the GaAs layer nitrated without a cap layer many cracks are found in the epilayer and the layer is sometimes peeled off from the substrate. It is found that the surface morphology of the GaN/porous-GaN/Si(1 1 1) sample is markedly improved by employing a 40 nm-thick interlayer grown at 800°C in addition to the above processes. A PL spectrum with a high intensity ratio between the excitonic emission and the deep yellow emission is obtained for the GaN/porous-GaN/Si(1 1 1) sample. E2 peak position in Raman scattering spectrum also shows a reduced stress for the GaN epilayers grown on the porous-GaN/Si(1 1 1).

Single and dual strained channel analysis of vertical strained — SiGe impact ionization MOSFET (VESIMOS)

Single Channel (SC) and Dual Channel (DC) Vertical Strained-SiGe Impact Ionization MOSFET (VESIMOS) has been successfully simulated and analyzed in this paper. Found out that SC VESIMOS operate in conventional MOSFET mode at V_DS = 1.75V, with 10% to 30% Ge mole fraction. However for Ge=50%, its operated in Impact Ionization (II) mode with fast switching speed of subthreshold value, S=9.8 mV/dec. A better performance in threshold voltage, V_TH, S value and I_ON/I_OFF ratio were found in DC VESIMOS as compared to SC VESIMOS. The V_TH=0.6V, S=10.98 mV/dec and I_ON/I_OFF = 1×10¹³ were measured in DC VESIMOS with Ge=30% that clarify the advantage of DC utilization on VESIMOS device. These improvements were mainly due to the enhancement of electron mobility from 600 m²/V-s (first channel) to 1400 m²/V-s (second channel). The electron mobility was increased due to the splitting of conduction band valley into six fold where the electron mass are reduced in out of plane direction and thus enhanced the mobility of electron.

Novel magnetic core materials impact modelling and analysis for minimization of RF heating loss

The eddy current that exists in RF transformer/inductor leads to generation of noise/heat in the circuit and ultimately reduces efficiency in RF system. Eddy current is generated in the magnetic core of the inductor/transformer largely determine the power loss for power transferring process. The losses for high-frequency magnetic components are complicated due to both the eddy current variation in magnetic core and copper windings reactance variation with frequency. Core materials permeability and permittivity are also related to variation of such losses those linked to the operating frequency. This paper will discuss mainly the selection of novel magnetic core materials for minimization of eddy power loss by using the approach of empirical equation and impedance plane simulation software TEDDY V1.2. By varying the operating frequency from 100 kHz to 1GHz and magnetic flux density from 0 to 2 Tesla, the eddy power loss is evaluated in our study. The Nano crystalline core material is found to be the best core material due to its low eddy power loss at low conductivity for optimum band of frequency application.

Optoelectronic properties of improved GaN semiconductor on Si (111) using growth approaches and different interlayer's

The crystalline quality of wider direct band gap semiconductor (3.4 eV) h-GaN epilayer grown on Si (111) is evaluated by different growth approaches and by using different interlayers. The investigations of GaN epilayer crystal quality for the template of converted porous GaN layer formed by novel nitridation process of thin (2 and 0.5 μm) GaAs layer on Si (111) and on C+ ion implanted very thin SiC layer formed on Si (111) and grown ambient effect are made. Epilayer grown on thinner non-isoelectronic converted SiC templates is found to broaden its PL line width whereas epilayer grown on porously converted GaN layer fromed from iso- electronic GaAs (111) layer on Si (111) is found narrow line width. H2 ambient grown film better crystalline quality and higher PL Ex. peak energy is found as compared to N2 ambient grown film. Low temperature PL measurement, similarity between defect related donor-acceptor peaks (DAP) to defect related yellow band luminescence at the room temperature PL measurement is also f...

Different materials coating effect on responsivity of Si UV photo detector

The effect of different anti-reflective coating on responsivity of silicon photo detector has been successfully analyzed in this work. N-type highly pure crystalline c-Si wafer based P+N photo detector is fabricated using Silvaco TCAD software. Different materials such as aluminium oxide (Al₂O₃), zinc oxide (ZnO), silicon nitride (Si₃N₄), silicon dioxide (SiO₂) and silicon carbide (SiC) are used as the anti-reflective coating. Different thickness of SiO₂+Si₃N₄ anti reflective coating (window) layers are designed for simulation and analysis of solar spectrum response. Improvement of the responsivity in the silicon photo detector is obtained by applying different materials as its coating. Combination of SiO₂ and Si₃N₄ dual layer anti-reflective coating is found promising for responsivity aspect.

Enhancing efficiency of organic solar cells by interfacial materials modification

This paper directed towards enhancing power conversion efficiency of organic photovoltaic by exploring emerging non-conjugated polymer material as an interfacial layers. The effect of non-conjugated polar polymers such as polymethyl methacrylate (PMMA), poly(4-vinylpyrirolidone) (PVPy) and poly(4-vinylalcohol) (PVA) as an interfacial layer (IFL) at the cathode side in improving the efficiency of poly(3-hexylthiophene):[6,6]-phenyl C61 butyric acid methyl ester (P3HT:PCBM) OPV cell. The best power conversion efficiency (pCE) for OPVs with PVPy film currently is about 3.51% compared to the OPVs without the PVPy film which is about 2.88%. Efficiency enhancement of OPVs with PVA and PMMA film, PCE=3.27% and 3.39% respectively shows that the addition of those interfacial layers between the cathode interfaces had improve charge carrier mobility relative to the devices lacking those materials. This is reflected on the enhancement of open circuit voltage, short circuit current and fill factor value of these OPV device. The introduction of interfacial layer materials to OPV device also had reduce the work function of Al and enhanced short circuit current of OPV device. This eventually improves the reliability and efficiency rate of OPV for future building integrated photovoltaic application.

Conductance and Capacitance Responses of Metal-Organic-Metal Structure Based Organic Semiconductor Thin Film

In this work we have investigated the frequency and the bias voltage dependence of the electrical responses of organic structures based on poly (triarylamine) (PTAA) thin film using ITO/Organic/Al diode structure. The frequency-dependent and bias voltage-dependent conductance and capacitance were investigated using a precision LCR meter with wide frequency test (10 Hz – 100 kHz) and various bias voltages ranges (0.2 to 5.0 V), respectively. Investigation revealed that conductance was strongly dependent on the frequency and bias voltage-dependent. Conductance was inversely proportional to the capacitance among the frequency. Meanwhile, the capacitance and series resistance were dependent until a certain value at the low frequency region, but the capacitance and series resistance were independent at high frequencies.

Does magnetic nano-materials in plane impedance vital for RF loss assessment?

RF (radiofrequency) system core size reduction is essential to operate it efficiently in RF power and sub-system. In this drive system power loss minimization at controlled volume is the key feature. Magnetic nano-materials higher permeability enhance functionality, energy efficiency is related to device power density and system miniaturization. The major RF heating loss is associated to in plane impedance that is varied due to applied field and frequency band. Presenting impedance plane simulation software; resistance as well as inductive reactance at particular frequency band have been evaluated thus RF power loss is realized. Nano-crystalline core lowest resistance linked to highest conductivity appears to be potential for device shrinking, RF power and sub-system loss minimization.

Enhanced reliability of vertical strained impact ionization MOSFET incorporating dielectric pocket for ultra-sensitive biosensor applications

Fast switching with an enhanced reliability device structure of Vertical Strained Impact Ionization MOSFET incorporating Dielectric Pocket (VESIMOS-DP) has been successfully design, simulated and analyzed in this paper. Ultra-low power with low subthreshold swing (S) and high breakdown voltage are imperative for ultra-sensitive biosensors. Impact ionization MOSFET (IMOS) is predicted to be capable of S as low as 20 mV/dec, which is much lower than Conventional MOSFET (CMOS). There are significant drop in subthreshold slope (S) while threshold voltage is increase as the body doping concentration increases. S value for DP place at source side is higher (S 24.4 mV/decade) as compared at the drain side (S 18.9 mV/decade) intrinsic region. The vicinity of DP near the drain region reduces charge sharing effects associated with the source and thus improves impact ionization rate. The introduction of a Dielectric Pocket (DP) is believed to be able to minimize the PBT effect while improving the reliability of the device by attaining higher breakdown voltage. Consequently, with the reduced of alloy scattering, the electron mobility has been improved by 22%. In many aspects, it is revealed that the incorporation of DP enhanced the reliability of VESIMOS for future development of nanoelectronic devices.

Path Planning Algorithm for Manipulators Based on an Improved Backtracking Search Algorithm

In this paper, we presented a Path Planning Algorithm (PPA) for Manipulators based on an improved Backtracking Search Algorithm (BSA). PPA calculates paths by searching grid points in Euclidean space directly instead of Configuration space(C-space). PPA generate copies of point for efficient Path Planning Algorithm and its reduce the complexity of BSA. The algorithm is back track free and resolution complete. Different from existing resolution complete algorithms, its computation time and memory space are proportional to the number of arms. Therefore paths can be calculated within practical time without backtrack even for manipulators with many arms, and it becomes possible to apply it to manipulators that operate in complicated and fully automated environments. The performance of PPA is evaluated for 2-dimensional environments while changing the number of arms and obstacle placements.