Bai Nguyen

FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals

An innovative, segmented high performance FPGA family with variable-grain-architecture and wide-gating functions

Efficient interconnect network for use in FPGA device having variable grain architecture

Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources

Synthesis-friendly FPGA architecture with variable length and variable timing interconnect

FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocks

Tileable and compact layout for super variable grain blocks within FPGA device

Methods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resources

Scalable serializer-deserializer architecture and programmable interface

Dual port SRAM memory for run time use in FPGA integrated circuits