Barry Jay Thaler

Co-fired ceramic on metal multichip modules for advanced military packaging

A novel, low temperature co-fired ceramic on metal (LTCC-M) multilayer circuit board technology intended for dual-use by both the military and commercial market sectors is described in this paper. This technology has been optimized for low cost, high circuit density multichip modules and board level integration. Limitations of the present low-temperature co-fired ceramic systems have been overcome by using a metal core in the LTCC-M technology. This technology readily allows the design of rugged, yet lightweight, electronic modules. In addition, the co-fired metal core permits this technology to be readily scaleable in terms of circuit density, size, and power dissipation; thereby making this an excellent candidate for a dual-use technology. Several advanced military packaging applications are pointed out in this paper.<<ETX>>

Development of a new multilayer copper-dielectric system

The development of a copper conductor and multilayer dielectric ink system, designed to overcome the dielectric porosity, Cu diffusion, and reheat stability problems commonly experienced with thick films fired in nitrogen, is discussed. The characteristics of the Cu and dielectric inks, which are formulated for screen printing on alumina substrates and firing in nitrogen at peak temperatures of 900-925 degrees C, are discussed. The dielectric, which is based on a devitrifying glass with ceramic oxides, produces extremely dense films having thermal expansion characteristics matching the substrate with a reheat stability up to 900 degrees C. Copper thick films on the dielectric are free from blistering in multilayers, and the dielectric is quite resistant to the diffusion of liquid flux phases present during the firing step. The dielectric typically passes the conductive salt solution porosity test with less than 1 mu A/cm/sup 2/ leakage current. The influence of the organic binder-system on dielectric film density and results of dielectric porosity and accelerated aging tests on multilayer circuit boards are discussed.<<ETX>>