Basavaraj I. Pawate

Computationally efficient algorithm for time scale modification (GLS-TSM)

Time scale modification (TSM) of signals is an important component in many speech coding and music applications. The major challenge is to achieve the necessary time scale modification yet maintaining the pitch information present in the input signal. We developed a new, computationally efficient algorithm called global and local search time scale modification (GLS-TSM) based on the principle of overlap and add. We have proved that the GLS-TSM algorithm reproduces high audio quality music with the desired time scale while preserving the pitch periodicity of the original signal. In addition, it provides an order of magnitude improvement in processing speed when compared to the most popular method, SOLA algorithm.

A new technique for improving quality of speech in voice over IP using time-scale modification

Packet arrival-delay variations and losses seriously affect the quality of voice delivered in VoIP. In this paper, using a time-scale modification algorithm, an integrated scheme is proposed to handle these impairments without introducing additional delays. This scheme provides flexible arrivaldelay cut-offs to late arriving packets, reducing the packet loss-rate at the receiver. Further, the lost packets are concealed effectively. Extensive simulations have shown that the proposed scheme delivers high-quality speech across widely varying packet arrival-delays and loss-rates. The proposed scheme is fully receiver-based and with its low computational complexity and generic nature, is applicable to any VoIP system.

Implementation of a hidden Markov model-based layered grammar recognizer

The authors describe the challenges encountered and the tradeoffs made in the implementation of a hidden Markov-model-based continuous-word recognizer. Calypso, a multiple processor system, is the implementation platform. The model-driven approach used in the recognition scheme is computationally demanding and requires a scoring buffer of several hundred kilobytes of data memory. Strategies to reduce this need for a large data-memory and number of compute-cycles without adversely impacting performance are given. Fixed-point representation issues and techniques to prevent overflows are addressed. As a result of these studies a TMS320C25-based continuous-word recognizer has been realized. All recognizer functions, including signal processing, model evaluation, and grammar control, are performed by a single TMS320C25. A time/space analysis of the implementation and performance of the word recognizer is given.<<ETX>>

Memory based digital signal processing

A cost-effective approach to increasing the processing throughput of many digital signal processing (DSP) systems is described.. This movement is achieved by migrating some of the basic computational elements to memory. The classic Von Neumann bottleneck is circumvented by localizing the computations to memory, and a high throughput is achieved by exploiting the memory architecture. For certain DSP applications that require a simple type of operation to be applied to a large amount of data, e.g. pattern recognition or matrix-matrix multiplications, the increase in throughput is very high. It is also shown that a system built with these memories is easier to use than systolic arrays or multiprocessor systems. As examples, compared to conventional solutions, a 10* improvement is shown for a continuous speech recognizer and a 16* improvement for a 128*128 matrix multiplication. Higher-orders-of-magnitude improvements are possible for larger problems and more memory chips.<<ETX>>

A new method for segmenting continuous speech

Speech recognition systems are increasingly utilized in various applications like telephone services where a user places a call by uttering the digits or the name of the person. One of the main problems in this application is the segmentation of the input utterance into speech and nonspeech portions. Current approaches typically suffer from two problems. They either incorporate noise as a part of the word to be enrolled or falsely classify a portion of a word as noise. As a result, recognition performance suffers. The authors present another approach to automatically segment continuous speech and create speaker dependent models. To verify the hypothesis, they use a database of 30 speakers whose speech has been recorded over the public switched telephone network. With this database, they benchmark their algorithm against a state of the art approach and show a 4/spl times/ reduction in the error rate of the recognition system.<<ETX>>

Connected word recognizer on a multiprocessor system

Speech recognition algorithms employing a similarity measure between the input speech utterance and the stored reference patterns to determine recognition of a word/sentence are computationally intensive. The instantaneous vocabulary size that can be handled in real-time is relatively small. This limitation can be alleviated by either using multiple programmable processors or by using special purpose hardware to handle the computation-intensive tasks. In a research environment the former approach is preferred, because improvements to the algorithm can rapidly be incorporated and their effects studied in real-time. Texas Instruments has developed a multiple-processor architecture based on the TMS32020 DSP, called Odyssey, that interfaces with Explorer, a symbolic computer. This paper addresses the issues involved in partitioning and allocating tasks in a multiple-processor environment to maximise throughput, and discusses the implementation of a grammar-driven speaker-dependent connected-word recognizer (GDCWR) as an example application that uses the power of multiple processors.