Bin Shu

Highly Strained Silicon Nitride Thin Film Deposited by PECVD with Double Frequencies in Strained Silicon Technologies

The mechanism of high stress in silicon nitride thin film is studied systematically in this paper. The effects of the various process parameters on the stress in silicon nitride thin film deposited by PECVD are analyzed and discussed. The silicon nitride thin film with high compressive and tensile stress has been deposited on the optimized process parameters and the compressive and tensile stress are up to-1.38GPa and 866MPa, respectively. Finally, the method of further improving the stress in silicon nitride thin film is presented.

Fabrication of high compressive stress silicon nitride membrane in strained silicon technology

The mechanism of compressive stress in silicon nitride membrane is studied in this paper. The effects of the various process parameters on the compressive stress in silicon nitride are analyzed and discussed on the basis of the current method using PECVD equipment. The high compressive stress silicon nitride membrane has been fabricated on the optimization of the process parameters, and the compressive stress is up to −1.08GPa. Finally, the method of further improving the compressive stress in silicon nitride membrane is put forward.

Hole Mobility in Arbitrary Orientation/Typical Plane Uniaxially-Strained Si Materials

Uniaxial strain technology is an effective way to improve the performance of nano-scale CMOS devices. In this paper, the relationships between hole scattering rates and the magnitude of stress and the orientation in uniaxiallystrained Si were studied on the basis of the six-bands kp model, Fermi’s golden rule and the theory of Boltzmann collision term approximation. Based on the model of hole effective masses and hole scattering rates, the models of hole mobility as a function of the magnitude of stress for arbitrary orientation/typical plane uniaxially-strained Si were established. Our analytic models and quantized results will provide significant theoretical reference for the understanding of strained materials physics and its design.

Research on Accumulation PMOS Capacitors Based on Strained-Si/SiGe Material

This paper presents a physical-based model for accumulation PMOS capacitor based on strained-Si/SiGe material. With this model, the physical mechanism of the “plateau”, observed in accumulation region of the C-V characteristics of the strained-Si(SSi)/SiGe PMOS capacitor, is studied. The results from the model show excellent agreement with the experimental data. The proposed model can provide valuable reference to the strained-Si device design and has been implemented in the software for extracting the parameter of strained-Si MOSFET.

Electron Mobility Model of Strained Si1-xGex(001)

Solving the Schrödinger equation with strain Hamiltonian and combining with KP theory, we obtained the conductivity effective mass and density of states effective mass of strained Si1-xGex(001) in this paper. On the basis of conductivity effective mass and density of states effective mass, considered of Fermi golden rule and Boltzman collision term approximation theory, scattering rate model was established in strained Si1-xGex(001). Based on the conductivity effective mass and scattering rate models we discussed the dependence of electron mobility on stress and doping concentration in strained Si1-xGex(001), it shows that electron mobility decrease with the increasing of stress and doping concentration. This result can provide valuable references to the research of electron mobility of strained Si1-xGex materials and the design of devices.

UWB Low-Voltage High-Linearity CMOS Mixer in Zero-IF Receiver

This paper presents and designs a UWB, low voltage, high linearity, folded CMOS direct down-conversion mixer in zero-IF receiver. The proposed mixer uses inverter, self-biasing and constant Gm biasing circuit. Also, inductor in LC resonating network is used to get rid of the negative effect of parasitic capacitor in this paper. Consequently, all performances of the mixer are effectively improved. This design is based on 0.18μm CMOS technology of SMIC (Semiconductor Manufacturing International Corporation), the simulation results show the conversion gain of 7dB, the NF of 13.8dB (the IF frequency is 20MHz), the IIP3 of 13.4dBm. The circuit operates at the supply voltage of 1.8V and dissipates 11mW. The dynamic range of total receiver can be effectively improved because of high linearity of the mixer.