Bing Lu

Optimal design methodology for LLC resonant converter

Although LLC resonant converter can achieve wide operation range with high efficiency, lack of design methodology makes it difficult to be implemented. In this paper, based on the theoretical analysis on the operation principles during normal condition and holdup time, the relationship between converter efficiency and operation range with different circuit parameters has be revealed. An optimal design methodology has been developed based on the revealed relationship. A 1MHz, 1kW LLC converter is designed to verify the proposed method.

1MHz High Efficiency LLC Resonant Converters with Synchronous Rectifier

This paper proposes a novel synchronous rectifier driving scheme for resonant converters. An LLC resonant converter with proposed synchronous rectification is designed and analyzed. It is a high efficiency, high power density solution for future frond end converters. Hold up time extension capability is achieved for designed LLC resonant converter without sacrificing the efficiency for nominal condition. 1kW, 1MHz LLC resonant converter with proposed SR is built to demonstrate its advantages (size and efficiency) over the diode rectification and PWM converter. Overall 95.1% efficiency and 96W/in3 power density are achieved.

Integrating active, passive and EMI-filter functions in power electronics systems:a case study of some technologies

Assemblies of power semiconductor switches and their associated drive circuits are at present available in modules. Upward into the multi-kilowatt range, mixed mode module construction is used. This incorporates monolithic, hybrid, surface mount, and wirebond technology. However, a close examination of the applications in motor drives and power supplies indicates that there has been no dramatic volume reduction of the subsystem. The power semiconductor modules have shrunk the power switching part of the converter, but the bulk of the subsystem volume still comprises the associated control, sensing, electromagnetic power passives (inductors, transformers, capacitors) and interconnects. This paper addresses the improvement of power processing technology through advanced integration of power electronics. The goal of a subsystem in a module necessitates this advanced integration, incorporating active switching stages, electromagnetic interference (EMI) filters, and electromagnetic power passives into modules by integration technology. The central philosophy of the technology development research in the National Science Foundation Engineering Research Center for Power Electronic Systems is to advance the state of the art by providing the concept of integrated power electronics modules (IPEMs) for all these functions. The technology underpinning such an IPEM approach is discussed.

Modeling and characterization of a 1 KW CCM PFC converter for conducted EMI prediction

The wide application of the power factor correction (PFC) techniques in the distributed power system (DPS) and the stringent international standards make it necessary to understand and predict the conducted electromagnetic interference (EMI) of the PFC circuit. Time domain simulation plus fast Fourier transform (FFT) is a viable method. However, the simulation circuit has to be carefully modeled, and must cover high frequency characteristics up to 30 MHz. For this purpose, multiple modeling and characterization techniques in the medium and high frequencies are developed, which finally lead to a good simulation circuit in Saber for a 1 KW continuous-conduction-mode (CCM) PFC converter. The conducted EMI of the PFC converter has been successfully predicted up to 30 MHz in terms of both differential-mode (DM) and common-mode (CM) noise, which substantiates the afore-mentioned modeling and characterization techniques. To explain the conducted EMI behavior of the CCM PFC in a systematic way, the DM and CM loop models of PFC EMI are proposed for describing the noise generation and propagation mechanisms. The effects of the PFC inductor and the parasitic capacitances at the MOSFET drain node are investigated to verify the validity of the DM and CM loop models.

Performance evaluation of CoolMOS/sup /spl trade// and SiC diode for single-phase power factor correction applications

The low conduction loss and switching loss characteristics make CoolMOS/sup /spl trade// and SiC diode attractive for the single-phase CCM PFC converters. In this paper, based on the device level and converter level evaluation, the loss reduction capability of the CoolMOS/sup /spl trade// and SiC diode is quantified. In addition, for the first time, a successfully operating 1 kW 400 kHz single-phase CCM PFC is demonstrated by using CoolMOS/sup /spl trade// and SiC diode.

Integrated CoolMOS FET/SiC-diode module for high performance power switching

A Si CoolMOS FET and SiC diode assembly with gate driver in boost configuration (ratings at 600 V/12 A), for power factor correction (PFC) application, has been fabricated in a version of IPEM - integrated power electronics module. It uses technology of so-called embedded power (EP), to form a three-dimensional (3-D) multiple chips/components interconnection with the capability of functional integration and high performance. An integrated power chip stage is built by embedding chips in a co-planar ceramic substrate and building up onto it a metallization thin-film interconnection. This deposited metallization not only bonds the power chips, but also provides the second-level interconnect wiring, so that associated components and base substrate are mounted from top and bottom sides. In this paper, the switching parameters of this module and their effects on a converters performance have been experimentally characterized. The procedures adopted for the defined fabrication processes of planar metallization interconnecting and solder stacking, are presented. In addition to the improvement of structural electrical properties, compared to a conventional discrete version, the characteristics of the planar process integration have also been demonstrated.

EMI Study for the Interleaved Multi-Channel PFC

For high power application the interleaved multichannel PFC is becoming more and more popular. It can effectively reduce the input ripple current due to the ripple cancellation effect. It is generally believed that the reduced input ripple current will lower down the DM EMI noise magnitude, which will make the DM Alter smaller. However, for most of todays PFC, running in the frequency range of 75 kHz ~ 150 kHz, the conventional 2-channel interleaving technique cannot help to reduce the EMI filter size at all. In this switching frequency range, the EMI filter design is based on the 2nd order harmonic, which cannot be reduced by the conventional interleaving. In this paper, a 2-channel PFC operating with 90 degree phase shift is introduced. It can cancel the 2nd order harmonic and reduce the 3rd order harmonic, and the EMI filter size can be reduced. This novel interleaving strategy can be further extended to other switching frequency range and other multi-channel interleaved PFC.

A high-frequency high-efficiency three-level LCC converter for high-voltage charging applications

For high-voltage charging applications, this paper introduces a variable-frequency zero-voltage-switching three-level LCC resonant converter, which is able to utilize the parasitic components of the high-turns-ratio transformer. By applying the three-level structure in the primary side, low-voltage MOSFETs can be used to minimize the conduction loss. Therefore, the switching frequency can be increased to shrink the size of passive components. In addition, a simulation-based process is presented for designing the resonant-tank parameters as a trade-off among the efficiency, power density and component stresses. The principle of operation for the converter is analyzed and verified on a 3 kW, 200 kHz, 10 kV charger prototype.

High frequency investigation of single-switch CCM power factor correction converter

To achieve higher power density, power converters are operating at higher switching frequencies. For the high switching frequency operating, not only the efficiency, but also the EMI performance is a big concern. In this paper, based on the developed EMI noise model, switching frequency impact on the single-switch CCM PFC is analyzed and evaluated. Switching frequency selection guideline is given.

Design Challenges For Distributed Power Systems

Remarkable progresses have been made over the past decade in power conversion technologies, including advanced power semiconductor devices, power management ICs, innovative circuit topologies, and packaging and integrated system solutions. These technological advancements have been manifested in a wide range of products and applications with ever increasing performances, efficiency, and power density. This paper highlights some of the challenges and opportunities of power conversion technologies in the distributed power system (DPS) for computer, telecommunication and network products. Topics discussed in this paper include improved EMI filter design techniques to mitigate the detrimental effects of filter-converter parasitics; impacts of the operating frequency of PFC to the size and weight of EMI filter; power conversion architecture and potential simplification; high-frequency high-density AC/DC and DC/DC topologies and designs; bus converters; as well as non-isolated point- of-load converters