Bo-Ting Chen

A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors

A new pixel circuit design for active matrix organic light-emitting diode (AMOLED), based on the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) is proposed and verified by SPICE simulation. Threshold voltage compensation pixel circuit consisting of four n-type TFTs, one p-type TFT, one additional control signal, and one storage capacitor is used to enhance display image quality. The simulation results show that this pixel circuit has high immunity to the variation of poly-Si TFT characteristics.

A source-follower type analog buffer using poly-Si TFTs with large design windows

New simple source follower circuits using low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) as analog buffers for the integrated data driver circuit of active-matrix liquid crystal displays and active-matrix light emitting diodes are discussed. In addition to the threshold voltage difference of driving TFTs, the unsaturated of output voltage arisen from the significant subthreshold current will also result in the difficulty of the buffer circuit design. The proposed circuit is capable of minimizing the variation from both the signal timing and the device characteristics.

Periodically Lateral Silicon Grains Fabricated by Excimer Laser Irradiation with a-Si Spacers for LTPS TFTs

Low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) with a periodic lateral silicon grain structure have been demonstrated to exhibit high-performance electrical characteristics via the amorphous silicon spacers above the amorphous silicon film crystallized with excimer laser. Amorphous silicon spacers allowed the bottom of the under-layered amorphous silicon film to serve as seed crystals. The periodic grain structure could be artificially controlled via the super lateral growth phenomenon during excimer laser irradiation. Consequently, such periodically large and lateral grains in the TFTs would achieve high field-effect-mobility of 298 cm 2 /V s, as compared with the conventional ones of 128 cm 2 /V s. In addition, the uniformity of device-to-device could be improved due to this location-manipulated lateral silicon grains.

Polycrystalline silicon thin-film transistors with location-controlled crystal grains fabricated by excimer laser crystallization

In this paper, location-controlled silicon crystal grains are fabricated by the excimer laser crystallization method which employs amorphous silicon spacer structure and prepatterned thin films. The amorphous silicon spacer in nanometer-sized width formed using spacer technology is served as seed crystal to artificially control superlateral growth phenomenon during excimer laser irradiation. An array of 1.8-μm-sized disklike silicon grains is formed, and the n-channel thin-film transistors whose channels located inside the artificially-controlled crystal grains exhibit higher performance of field-effect-mobility reaching 308cm2∕Vs as compared with the conventional ones. This position-manipulated silicon grains are essential to high-performance and good uniformity devices.

High-Performance Poly-Si Thin Film Transistors Crystallized by Excimer Laser Irradiation with A-Si Spacer Structure

In this work, high-performance polycrystalline Si thin film transistors have been fabricated by excimer laser crystallization of an amorphous Si film deposited on an array of amorphous Si spacers. The amorphous Si spacersserved as seeds for lateral growth during excimer laser irradiation. Large longitudinal grains could be found in the device channel regions. In consequence, the thin-film transistors fabricated with Si spacer structure exhibited a high field-effect mobility of 288 cm 2 /V-s while the mobility of the conventional counterpart was 129 cm 2 /V-s. In addition, the uniformity of the device performance was improved as lateral growth could be artificially controlled.

Threshold-voltage-compensation methods for AMOLED pixel and analog buffer circuits

— New pixel-circuit designs for active-matrix organic light-emitting diodes (AMOLEDs) and a new analog buffer circuit for the integrated data-driver circuit of active-matrix liquid-crystal displays (AMLCDs) and AMOLEDs, based on low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs), were proposed and verified by SPICE simulation and measured results. Threshold-voltage-compensation pixel circuits consisting of LTPS-TFTs, an additional control signal line, and a storage capacitor were used to enhance display-image uniformity. A diode-connected concept is used to calibrate the threshold-voltage variation of the driving TFT in an AMOLED pixel circuit. An active load is added and a calibration operation is applied to study the influences on the analog buffer circuit. The proposed circuits are shown to be capable of minimizing the variation from the device characteristics through the simulation and measured results.

Low Temperature Polycrystalline Silicon Thin Film Transistors Fabricated by Amorphous Silicon Spacer Structure with Pre-Patterned TEOS Oxide Layer

In this paper, location-controlled grain growth with α-Si spacer structure was fabricated. Consequently, High-performance poly-Si TFTs with field-effect mobility exceeding 367cm^2/V-s and high device uniformity have been fabricated. The excellent electrical characteristics is attributed to large grain and grain boundary elimination in the channel region.

Symmetric Gate-Overlapped LDD Poly-Si TFTs with Selective and Isotropic Deposited Ni Sub-gate

A novel fabrication process for self-aligned gate-overlapped lightly doped drain (SAGOLDD) thin-film transistors (TFTs) using excimer laser irradiation to form the graded LDD dopant profile and selectively plated Ni surrounding-gate to form the gate-overlap is demonstrated. The SAGOLDD TFT device exhibits much lower leakage current, higher on/off current ratio and better hot carrier stress endurance than self-aligned (SA) TFTs due to the lower electric field generated by graded LDD dopant profile.