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Dive into the research topics where Chun-Chien Tsai is active.

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Featured researches published by Chun-Chien Tsai.


Applied Physics Letters | 2000

Electrical characterization of isoelectronic In-doping effects in GaN films grown by metalorganic vapor phase epitaxy

H. M. Chung; W. C. Chuang; Yung-Chung Pan; Chun-Chien Tsai; M. C. Lee; Wei-Chen Chen; W. K. Chen; C. I. Chiang; Chi-Hung Lin; Hwan-You Chang

Indium isoelectronic doping was found to have profound effects on electrical properties of GaN films grown by metalorganic chemical vapor deposition. When a small amount of In atoms was introduced into the epilayer, the ideality factor of n-GaN Schottky diode was improved from 1.20 to 1.06, and its calculated saturation current could be reduced by 2 orders of magnitude as compared to that of the undoped sample. Moreover, it is interesting to note that In isodoping can effectively suppress the formation of deep levels at 0.149 and 0.601 eV below the conduction band, with the 0.149 eV trap concentration even reduced to an undetected level. Our result indicates that the isoelectronic In-doping technique is a viable way to improve the GaN film quality.


IEEE\/OSA Journal of Display Technology | 2005

A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors

Ya-Hsiang Tai; Bo-Ting Chen; Yu-Ju Kuo; Chun-Chien Tsai; Ko-Yu Chiang; Ying-Jyun Wei; Huang-Chung Cheng

A new pixel circuit design for active matrix organic light-emitting diode (AMOLED), based on the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) is proposed and verified by SPICE simulation. Threshold voltage compensation pixel circuit consisting of four n-type TFTs, one p-type TFT, one additional control signal, and one storage capacitor is used to enhance display image quality. The simulation results show that this pixel circuit has high immunity to the variation of poly-Si TFT characteristics.


Japanese Journal of Applied Physics | 2005

Effects of High-Density Oxygen Plasma Posttreatment on Field Emission Properties of Carbon Nanotube Field-Emission Displays

Chuan-Ping Juan; Chun-Chien Tsai; Kuei-Hsien Chen; Li-Chyong Chen; Huang-Chung Cheng

The effects of oxygen plasma posttreatment (PPT) on the morphology and field emission properties of carbon nanotube (CNT) arrays grown on silicon substrates are proposed and experimental results are reported. Oxygen PPT led to an enhancement in the emission properties of CNTs, which showed an increase in total emission current density and a decrease in turn-on field after plasma treatment. Scanning electron microscopy (SEM) images showed reduced densities of the CNTs, which resulted in a decrease of the screening effect in the electric field. Raman spectra showed an increase in the number of defects which served as field-emission sites when the plasma power or treatment time with the plasma increased. Transmission electron microscopy (TEM) images were used to identify the quality of the nanotubes, so that we could clearly find evidences of improvement in the field emission properties after plasma treatment. The measurement of electrical characteristics revealed improved field emission properties under proper plasma conditions. The turn-on field decreased from 4.8 to 2.5 V/µm, and the emission current density increased from 78.7 µA/cm2 to 18 mA/cm2 at an applied field of 5.5 V/µm.


IEEE Electron Device Letters | 2007

High-Performance Short-Channel Double-Gate Low-Temperature Polysilicon Thin-Film Transistors Using Excimer Laser Crystallization

Chun-Chien Tsai; Kai-Fang Wei; Yao-Jen Lee; Hsu-Hsin Chen; Jyh-Liang Wang; I-Che Lee; Huang-Chung Cheng

In this letter, high-performance low-temperature polysilicon thin-film transistors (TFTs) with double-gate (DG) structure and controlled lateral grain growth have been demonstrated by excimer laser crystallization. Via a proper excimer laser condition, along with the a-Si step height beside the bottom gate, a superlateral growth of Si was formed in the channel length plateau. Therefore, the DG TFTs with lateral silicon grains in the channel regions exhibited better current-voltage characteristics, as compared with the conventional top-gate ones. The proposed DG TFTs (W/L = 1/1 mum) had the field-effect mobility exceeding 550 cm2/Vmiddots, an on/off current ratio that is higher than 108, superior short-channel characteristics, and higher current drivability. In addition, the device-to-device uniformity could be improved since grain growth could be artificially controlled by the spatial plateau structure.


Electrochemical and Solid State Letters | 2006

A Poly-Si Thin-Film Transistor with the In Situ Vacuum Gaps under the T-Shaped-Gated Electrode

Ta-Chuan Liao; Chun-Yu Wu; Feng-Tso Chien; Chun-Chien Tsai; Hsiu-Hsin Chen; Chung-Yuan Kung; Huang-Chung Cheng

A T-shaped-gated (T-gate) poly-Si thin-film transistor (TFT) with symmetric vacuum gaps has been proposed and fabricated simply with a selective-etching technique and an in situ vacuum encapsulation. The proposed TFT has demonstrated a higher maximum on-off current ratio and superior reliability compared to the conventional TFTs. This is attributed to the resulting offset region and vacuum gap to reduce the off-state leakage current and improve the hot-carrier reliability, while the extra subgate serves to induce an inversion layer at the offset region to maintain the on current during the on state. Therefore, such a T-gate poly-Si TFT is very suitable for manufacturing and applications in active-matrix flat panel electronics.


Journal of Physics D | 2008

Ferroelectricity and negative temperature coefficient of resistance in pulsed-laser-deposited (Pb,Sr)TiO3 films

Jyh-Liang Wang; Yi-Sheng Lai; Sz-Chian Liou; Chun-Chien Tsai; Bi-Shiou Chiou; Huang-Chung Cheng

(Pb,Sr)TiO3 films deposited on Pt/SiO2/Si substrates by pulsed-laser deposition (PLD) at 400 °C with oxygen pressures ranging from 50 to 200 mTorr have been investigated. The paraelectricity-to-ferroelectricity transition of films depends on the oxygen pressure during deposition. Films deposited at 200 mTorr exhibit paraelectric-like nature, whereas films deposited at lower pressures present the ferroelectric characteristic. The (Pb,Sr)TiO3 film is found to exhibit a negative temperature coefficient of resistance (NTCR) at the measurement temperature ranging from 30 to 390 °C. This work demonstrates that the ferroelectricity/paraelectricity and the temperature coefficient of resistance of (Pb,Sr)TiO3 films could be controlled by oxygen pressures during PLD.


Journal of The Electrochemical Society | 2007

Periodically Lateral Silicon Grains Fabricated by Excimer Laser Irradiation with a-Si Spacers for LTPS TFTs

Huang-Chung Cheng; Chun-Chien Tsai; Jian-Hao Lu; Hsu-Hsin Chen; Bo-Ting Chen; Ting-Kuo Chang; Ching-Wei Lin

Low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) with a periodic lateral silicon grain structure have been demonstrated to exhibit high-performance electrical characteristics via the amorphous silicon spacers above the amorphous silicon film crystallized with excimer laser. Amorphous silicon spacers allowed the bottom of the under-layered amorphous silicon film to serve as seed crystals. The periodic grain structure could be artificially controlled via the super lateral growth phenomenon during excimer laser irradiation. Consequently, such periodically large and lateral grains in the TFTs would achieve high field-effect-mobility of 298 cm 2 /V s, as compared with the conventional ones of 128 cm 2 /V s. In addition, the uniformity of device-to-device could be improved due to this location-manipulated lateral silicon grains.


Applied Physics Letters | 2007

Polycrystalline silicon thin-film transistors with location-controlled crystal grains fabricated by excimer laser crystallization

Chun-Chien Tsai; Yao-Jen Lee; Ko-Yu Chiang; Jyh-Liang Wang; I-Che Lee; Hsu-Hsin Chen; Kai-Fang Wei; Ting-Kuo Chang; Bo-Ting Chen; Huang-Chung Cheng

In this paper, location-controlled silicon crystal grains are fabricated by the excimer laser crystallization method which employs amorphous silicon spacer structure and prepatterned thin films. The amorphous silicon spacer in nanometer-sized width formed using spacer technology is served as seed crystal to artificially control superlateral growth phenomenon during excimer laser irradiation. An array of 1.8-μm-sized disklike silicon grains is formed, and the n-channel thin-film transistors whose channels located inside the artificially-controlled crystal grains exhibit higher performance of field-effect-mobility reaching 308cm2∕Vs as compared with the conventional ones. This position-manipulated silicon grains are essential to high-performance and good uniformity devices.


Japanese Journal of Applied Physics | 2005

Improved Field-Emission Properties of Carbon Nanotube Field-Emission Arrays by Controlled Density Growth of Carbon Nanotubes

Chuall-Ping Juan; Kuo-Ji Chen; Chun-Chien Tsai; Kao-Chao Lin; Wei-Kai Hong; Chen-Yu Hsieh; Wen-Pin Wang; Rui-Ling Lai; Kuei-Hsien Chen; Li-Chyong Chen; Huang-Chung Cheng

The density distribution of CNTs is one of the crucial parameters determing the field-emission property of CNTs. To effectively control the density of CNTs, an inactive thin-film layer was deposited on a catalyst. The results showed that improved field emission property could be obtained with a thin SiO layer on the catalyst layer as the precursor. For 3.5 nm Fe and 3.5 nm SiO on 3.5 nm Fe as a catalyst, the turn-on field could be decreased from 3.7 V/µm. to 2.2 V/µm and the field-emission current density increased from 2.6×10-8 A/cm2 to 2.4×10-4 A/cm2 when the applied field was 4 V/µm


IEEE Electron Device Letters | 2012

A Novel SONOS Memory With Recessed-Channel Poly-Si TFT via Excimer Laser Crystallization

I-Che Lee; Chun-Chien Tsai; Hsu-Hang Kuo; Po-Yu Yang; Chao-Lung Wang; Huang-Chung Cheng

A silicon-oxide-nitride-oxide-silicon memory with recessed-channel (RC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) via excimer laser crystallization (ELC) has been demonstrated to achieve a high mobility of ~ 400 cm2/V · s and a large ON/OFF current ratio of ~ 108. Such a high performance is because the RC poly-Si TFTs possess only one perpendicular grain boundary (GB) in the channel and the corresponding protrusion at this GB. In addition, the proposed devices also exhibited the largest memory window of 2.63 V in 10 ms with respect to 2.37 and 1.31 V for the conventional-ELC and solid-phase-crystallized ones, respectively. Since the silicon grain growth could be artificially controlled, the device-to-device uniformity could be significantly improved. Therefore, such a simple scheme is promising for applications of low-temperature poly-Si TFTs in 3-D ICs and system on panel.

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Huang-Chung Cheng

National Chiao Tung University

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Bo-Ting Chen

National Chiao Tung University

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I-Che Lee

National Chiao Tung University

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Jyh-Liang Wang

Ming Chi University of Technology

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Po-Yu Yang

National Chiao Tung University

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Ya-Hsiang Tai

National Chiao Tung University

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Ying-Jyun Wei

National Chiao Tung University

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Chao-Lung Wang

National Chiao Tung University

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Chuan-Ping Juan

National Chiao Tung University

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