Ya-Hsiang Tai

Bias-induced oxygen adsorption in zinc tin oxide thin film transistors under dynamic stress

This study investigates the effects of bias-induced oxygen adsorption on the electrical characteristic instability of zinc tin oxide thin film transistors in different ambient oxygen partial pressures. When oxygen pressure is largest, the threshold voltages showed the quickest increase but the slowest recovery during the stress phase and recovery phase, respectively. This finding corresponds to the charge trapping time constant and recovery time constant, which are extracted by fitting the stretched-exponential equation and which exhibit a relationship with oxygen pressure. We suggest that the gate bias reduces the activation energy of oxygen adsorption during gate bias stress.

Environment-dependent thermal instability of sol-gel derived amorphous indium- gallium-zinc-oxide thin film transistors

The environment-dependent electrical performances as a function of temperature for sol-gel derived amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors are investigated in this letter. In the ambients without oxygen, thermal activation dominates and enhances device performance. In oxygen-containing environments, mobility and drain current degrades and the threshold slightly increase as temperature increases. We develop a porous model for a-IGZO film relating to the drain current and mobility lowering due to film porosity and oxygen adsorption/penetration. It also relates to the threshold voltage recovery at high temperature owing to the varying form of adsorbed oxygen and the combination of oxygen and vacancies.

Characteristics and Mechanisms of Silicon-Oxide-Based Resistance Random Access Memory

Traditionally, a large number of silicon oxide materials are extensively used as various dielectrics for semiconductor industries. In general, silicon oxide cannot be used as resistance random access memory (RRAM) due to its insulating electrical properties. In this letter, we have successfully produced resistive switching and forming-free behaviors by zinc doped into silicon oxide. The current-voltage fitting data show that current transport mechanism is governed by Poole-Frenkel behavior in high-resistance state and Ohms law in low-resistance state, consisting with filament theory. Additionally, good endurance and retention reliabilities are exhibited in the zinc-doped silicon oxide RRAM.

Bipolar Resistive RAM Characteristics Induced by Nickel Incorporated Into Silicon Oxide Dielectrics for IC Applications

In this letter, we successfully produced resistive switching behaviors by nickel doped into silicon oxide at room temperature. The nickel element was doped into silicon oxide, which is a useful dielectric material in integrated circuit (IC) industries by cosputtering technology. Based on the proposed method, satisfactory reliability of the resistance switching device can be demonstrated by endurance and retention evaluation. We believe that the silicon oxide doped with nickel at room temperature is a promising method for resistive random access memory nonvolatile memory applications due to its compatibility with the IC processes.

A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors

A new pixel circuit design for active matrix organic light-emitting diode (AMOLED), based on the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) is proposed and verified by SPICE simulation. Threshold voltage compensation pixel circuit consisting of four n-type TFTs, one p-type TFT, one additional control signal, and one storage capacitor is used to enhance display image quality. The simulation results show that this pixel circuit has high immunity to the variation of poly-Si TFT characteristics.

Charge Quantity Influence on Resistance Switching Characteristic During Forming Process

In this letter, we presented that the charge quantity is the critical factor for forming process. Forming is a pivotal process in resistance random access memory to activate the resistance switching behavior. However, overforming would lead to device damage. In general, the overshoot current has been considered as a degradation reason during the forming process. In this letter, the quantity of charge through the switching layer has been proven as the key element in the formation of the conduction path. Ultrafast pulse forming can form a discontinuous conduction path to reduce the operation power.

Novel Gate-All-Around Poly-Si TFTs With Multiple Nanowire Channels

The novel gate-all-around (GAA) poly-Si thin-film transistors (TFTs) with multiple nanowire channels (MNCs) have been, for the first time, fabricated using a simple process to demonstrate high-performance electrical characteristics and high immunity to short-channel effects (SCEs). The nanowire channel with high body-thickness-to-width ratio (TFin/WFin), which is approximately equal to one, was realized only with a sidewall-spacer formation. Moreover, the unique suspending MNCs were also achieved to build the GAA structure. The resultant GAA-MNC TFTs showed outstanding three-dimensional (3-D) gate controllability and excellent electrical characteristics, which revealed a high on/off current ratio ( > 108), a low threshold voltage, a steep subthreshold swing, a near-free drain-induced barrier lowering, as well as an excellent SCE suppression. Therefore, such high-performance GAA-MNC TFTs are very suitable for applications in system-on-panel and 3-D circuits.

Origin of Hopping Conduction in Sn-Doped Silicon Oxide RRAM With Supercritical

In this letter, we investigate the origin of hopping conduction in the low-resistance state (LRS) of a resistive random access memory device with supercritical CO2 fluid treatment. The dangling bonds of a tin-doped silicon oxide ( Sn:SiOx) thin film were cross linked by the hydration-dehydration reaction through supercritical fluid technology. The current conduction mechanism of the LRS in the posttreated Sn:SiOx thin film was transferred to hopping conduction from Ohmic conduction, owing to isolation of metal tin in the Sn:SiOx thin film by hydration-dehydration reaction. The phenomena can be verified by our proposed reaction model, which is speculated by the X-ray photoelectron spectroscopy analyses.

\hbox{CO}_{2}

In this study, a distributed charge storage with GeO2 nanodots is demonstrated. The mean size and aerial density of the nanodots embedded in SiO2 are estimated to be about 5.5 nm and 4.3×1011 cm−2, respectively. The composition of the dots is also confirmed to be GeO2 by x-ray absorption near-edge structure analyses. A significant memory effect is observed through the electrical measurements. Under the low voltage operation of 5 V, the memory window is estimated to ∼0.45 V. Also, a physical model is proposed to demonstrate the charge storage effect through the interfacial traps of GeO2 nanodots.

Fluid Treatment

This investigation examines polycrystalline silicon thin-film transistors (TFTs) with multiple nanowire channels and a lightly doped drain (LDD). A device with an LDD structure exhibits low leakage current because the lateral electrical field is reduced in the drain offset region. Additionally, multiple nanowire channels can generate fewer defects in the polysilicon grain boundary and have more efficient NH3 plasma passivation than single-channel TFTs, further reducing leakage current. They exhibit superior electrical characteristics to those of single-channel TFTs, such as a higher ON/OFF current ratio (>108), a better subthreshold slope of 110 mV/decade, an absence of drain-induced barrier lowering, and suppressed kink-effect. Devices with the proposed TFTs are highly promising for use in active-matrix liquid-crystal display technologies.