Boel Gustafson

High peak-to-valley ratios observed in InAs/InP resonant tunneling quantum dot stacks

Resonant tunneling was observed through single InAs quantum dot (QD) stacks embedded in InP barriers with peak-to-valley ratios as high as 85 at 7 K. Negative differential resistance in the current–voltage [I(V)] characteristics was obtained up to a point above the temperature of liquid nitrogen. These features were observed in measurements on low-density QD stacks, in which a macroscopic ohmic contact covered less than 150 QD stacks. Due to the design of the structure, the upper QD in the stack has the function of a zero-dimensional emitter. Electrons easily fill the upper dot, whereas tunneling through the entire structure is only allowed when two states in the dots align energetically, resulting in sharp resonant tunneling peaks with high peak-to-valley ratios.

Lateral current-constriction in vertical devices using openings in buried lattices of metallic discs

Vertical channels in semi-insulating GaAs were realized by epitaxial overgrowth over lattices of W discs, including n×n vacant positions. The Schottky depletion around the metallic inclusions is responsible for the semi-insulating behavior, and, thus, conducting channels may be created in designed openings in the lattice. By measuring the current transport in structures with varying sizes of the channels, we demonstrate that the current is actually restricted to floating through the vacant positions. We further buried the metal discs, including openings, 60 nm above a resonant tunneling structure, and measured a negative differential resistance, with peak currents scaling with the opening area. These experiments demonstrate the effective combination of semiconductor heterostructures and embedded metal features for submicron, vertical injection into a heterostructure device.

Designed emitter states in resonant tunneling through quantum dots

Resonant tunneling through a single layer of self-assembled quantum dots (QDs) is compared to tunneling through two layers of vertically aligned (stacked) dots. The difference can be viewed as going from a two-dimensional emitter to a zero-dimensional emitter. The temperature dependence of current peaks originating in tunneling through individual QDs and individual stacks is used to clarify this point. In addition, we show that the statistical size distribution of self-assembled quantum dots causing the inhomogeneous broadening in luminescence experiments can be analyzed in a resonant tunneling experiment

MOVPE overgrowth of metallic features for realisation of 3D metal–semiconductor quantum devices

Abstract We have studied the growth conditions for epitaxial overgrowth over metallic features using low-pressure metalorganic vapour phase epitaxy. The aim of this study is to optimise the growth conditions and to establish a processing sequence for the realisation of 3D metal–semiconductor quantum devices. First, we investigate the effect of the metal pattern (orientation and shape) on the resulting growth behaviour under fixed epitaxial conditions. Then we use the same pattern and vary the growth temperature in order to optimise the lateral growth above the metal. An excellent crystalline quality of the overgrown material is thereafter demonstrated using transmission electron microscopy. Finally, it is demonstrated how these structures may be used in two types of quantum devices, namely as storage elements in a semi-insulating layer and as an active part in a resonant tunnelling transistor.

Lateral confinement in a resonant tunneling transistor with a buried metallic gate

We have fabricated a resonant tunneling transistor by epitaxial overgrowth over a tungsten grating placed 30 nm above a GaAs/GaInP semiconductor, double barrier, resonant tunneling heterostructure. The Schottky depletion around the buried metal contacts controls the current to a vertical transistor channel. The lateral extension of this channel is defined by a square opening in the grating with a side length of 1.4 μm, which corresponds to a sub-μm electrical width. The transport properties at 20 K show a fine structure in the resonant tunneling characteristics, and it is affected by the gate bias. These effects are discussed in terms of lateral quantum confinement in the transistor channel defined.

MOVPE growth of InPGaInAs and GaAsGaInP heterostructures for electronic transport applications

Abstract The influence of the layer structure on the electrical properties in (i) modulation doped InP GaInAs quantum well samples, and, (ii) GaAs GaInP resonant tunneling diodes has been investigated. The results reveal the importance of the different scattering processes. In particular, the influence of interface roughness scattering has been evaluated for both types of structures.

Metalorganic vapor phase epitaxy-grown GaP/GaAs/GaP and GaAsP/GaAs/GaAsP n-type resonant tunnelling diodes

We have studied GaP/GaAs/GaP and GaAsxP1−x/GaAs/GaAsxP1−x double-barrier resonant tunnelling diodes grown by metalorganic vapor phase epitaxy. We find that GaP tensile strained barriers in GaP/GaAs/GaP diodes may be grown with a barrier thickness below the critical thickness of about 12 monolayers. However, a corrugation of the strained barrier is observed by transmission electron microscopy. This variation may explain the low peak-to-valley ratio of the diodes (about 2). In contrast, GaAsxP1−x/GaAs/GaAsxP1−x resonant tunnelling diodes have been grown with a homogeneous thickness of the barriers, consequently showing a substantially improved electrical performance compared to the GaP diodes with peak-to-valley ratios >5.

Lateral current confinement in selectively grown resonant tunneling transistor with an embedded gate

We report on fabrication and measurements of a selectively grown vertical resonant tunneling transistor with lateral current constriction. A GaInP/GaAs/GaInP, 3/9/3 nm, double barrier structure is epitaxially grown over a grating of tungsten (W) wires, where the Schottky depletion around the embedded wires creates a semi-insulating layer. The vertical current in the device passes the semi-insulating region through a designed opening (1×1μm2) in the grating, which, taking the depletion region into account, gives a transistor with an electrical area of well below 1μm2. Current–voltage (I–V) measurements at 4 K show a multitude of current peaks that respond strongly to the gate voltage applied to the metal grating. From the gate response and the small lateral area, we believe that these peaks arise from lateral confinement effects.

Gated Tunneling Structures with Buried Tungsten Grating Adjacent to Semiconductor Heterostructures

A tungsten (W) grating was fabricated and embedded in GaAs by MOVPE (metal organic vapor phase epitaxy) with the aim of realizing novel applications of ultrafine metal electrodes within semiconductor nanodevices. A combination of W grating and a semiconductor single heterobarrier was used to control the vertical current through the structure based on an effective barrier height modulation controlled by the Schottky depletion around the metal. Transistor operation was observed at room temperature and the mode of operation discussed. Moreover, a gated resonant tunneling transistor was demonstrated at 20 K by integrating GaInP/GaAs double barriers and W grating, including a 1.4 ×1.4 µm2 opening window, to form a vertical channel. The peak-to-valley current ratios were modulated by the gate bias, and fine features due to the lateral potential constriction were observed directly in the current-voltage characteristics.

Strain in GaP/GaAs and GaAs/GaP resonant tunnelling heterostructures

We studied the morphology of GaP/(001)GaAs and GaAs/(001)GaP heterostructures grown by metal-organic vapour-phase epitaxy and found wire-like surface undulations elongated in the [110] direction. We attribute this elongation to anisotropic lateral growth rates in the [110] and [110] directions, which are due to a different roughness of monolayer surface steps. In III-V materials grown by molecular beam epitaxy. such surface corrugations are usually elongated in [110]. We explain this difference by the two growth methods having inverted ratios of lateral growth rates in [110] and [110]. Resonant tunnelling diodes fabricated from the GaP/GaAs heterostructures showed very symmetric I-V characteristics. Their peak-to-valley ratio was limited to 2. most probably due to the corrugation of the GaP barriers