Bong-Hyun You

P‐12: A New a‐Si:H TFT Pixel Design Compensating Threshold Voltage Degradation of TFT and OLED

A new active matrix organic light emitting diode (AM-OLED) pixel design, based on the a-Si:H TFTs, is proposed and verified by SPICE simulations. The simulation results show that the proposed pixel, which consists of 7-TFT and 1-capacitor and 1-additional signal line, compensates the problem of the threshold voltage degradation in the a-Si:H TFT and OLED.

P-14: Polarity-Balanced Driving to Reduce VTH Shift in a-Si for Active-Matrix OLEDs

A new driving scheme, which consists of dual scan line and 2 driving TFTs, employing a-Si TFT rather than the low temperature poly-Si for AMOLED is proposed. The proposed scheme was verified by circuit simulation with parameters extracted from experimental results. The recovery of threshold voltage by successive positive and negative bias may contribute the reliability of OLED display.

P‐2: A New a‐Si:H TFT Pixel Circuit Suppressing OLED Current Error Caused by the Hysteresis and Threshold Voltage Shift for Active Matrix Organic Light Emitting Diode

A new a-Si:H TFT pixel circuit for active matrix organic light emitting diode (AMOLED) is proposed and verified by device measurements and SPICE simulations. The experimental and simulation results show that the proposed pixel, which consists of 6-TFT and 1-capacitor and 2-additional horizontal signal lines, reduces a threshold voltage shift rate of a-Si:H TFT by reverse bias annealing, as well as compensates both a threshold voltage shift and hysteresis phenomenon of a-Si:H TFT by VT memory scheme.

Polarity Balanced Driving Scheme to Suppress the Degradation of

In this paper, we propose a new amorphous silicon (a-Si:H) thin-film transistor (TFT) pixel circuit employing negative bias annealing for active-matrix organic light-emitting diode (AMOLED). This circuit consists of two driving TFTs, four switching TFTs, and two storage capacitors. The new driving scheme adopting negative bias annealing entitled polarity balanced driving (PBD) successfully suppresses the troublesome Vth shift in a-Si:H TFT. The proposed pixel circuit was verified by simulation and fabrication. When a severe electrical bias is applied more than 24 hours and a temperature is increased up to 60 degC rather than a room temperature, the current stability (Iafter_stress/Imax) of the proposed PBD pixel is 0.97 while that of the conventional one is 0.72. Our experimental results show that the proposed PBD can improve a stability of a-Si:H TFT because the applied negative gate bias can successfully suppress Vth shift of the current-driving a-Si:H TFT

V_{\rm th}

In order to suppress the malfunction caused by the shift of the threshold voltage (VTH) of oxide thin film transistors (TFTs) to a negative value, double-gate TFTs are used in the shift register of the gate driving system to control VTH by adjusting the top gate bias. The proposed circuit detects the current consumption of the shift register and adjusts VTH so that the current consumption of the shift register is regulated within the desired value. The system includes a compensation algorithm, which can search for an optimized top gate bias in various circumstances such as process fluctuations and ambient temperature change. The proposed system provides a stable operation compared with a conventional structure especially at high temperature. Experimental results show that, in the conventional system without compensation, the output voltage of the shift register deteriorates at 80°C and above, and the power consumption increases from 1.15 to 2.14 mW after 21600 s of continuous operation at 60°C. On the other hand, the proposed system provides a stable gate output up to 100°C and keeps the power consumption below 1.10 mW by adjusting the top gate bias responding to environment changes.

in a-Si:H TFT Due to the Positive Gate Bias Stress for AMOLED

We have fabricated TFT using the silicon nitride ILD Inter-layer Dielectric and silicon oxide ILD in order to analyze the self-heating effect. The degradation of poly-Si TFT Thin Film Transistor was investigated under high power condition. The silicon nitride with large thermal conductivity for the ILD reduces the temperature of channel region so that the reliability of poly-Si TFTs is considerably improved.

Real-Time External Compensation of Threshold Voltage Shift Using Double-Gate Oxide TFTs in a Gate Driving System

An experimental scheme for validating the cause of the hysteresis phenomenon in hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) is reported. The different gate starting voltage to the desired gate voltage has been considered to prove an effect of filling an acceptor-like or donor-like state in the interface. The integration time of the semiconductor parameter analyzer (HP4156B) has also been controlled to investigate the effect between the detrapping rate and hysteresis. The experimental results show that the previous data voltage in the (n-1)th frame affects the OLED current in the (n)th frame.

P-13: ILD Inter-layer Dielectric Engineering for Reduction of Self-Heating Effect in Poly-Si TFT

An ultralow temperature (150°C) polycrystalline silicon (poly-Si) film was successfully deposited by inductively coupled plasma chemical vapor deposition (ICP-CVD) and excimer laser annealing (ELA). The precursor active layer was deposited at a temperature of 150°C by ICP-CVD using an SiH4/He mixture. The deposited silicon film consisted of a crystalline Si component as well as a hydrogenated amorphous Si component. The hydrogen content in the precursor layer was less than 5 at %. After excimer laser irradiation, the grain size of the poly-silicon film was in the range 300 ~ 500nm. Various characteristics and qualities of the poly-silicon film were verified.