Brandt Braswell

Corner models: Inaccurate at best, and it only gets worst …

Corner (best- and worst-case) models have been a mainstay of integrated circuit design for decades. Obviously they can be effective, especially for digital CMOS design. However, there are significant inaccuracies that arise when digital CMOS corner models are used for analog circuits, or any types of circuits or measures of circuit performance they were not targeted for. This paper details what corner models can and cannot do, and shows their inadequacies for analog CMOS circuits.

Self-biasing and self-amplifying MOSFET mismatch test structure

This paper presents a 4-transistor test structure for measurement and characterization of MOSFET mismatch. The structure consists of a CMOS inverter with its output connected to its input, so it self-biases at a point of high sensitivity to parametric variations from mismatch, connected to a second identical inverter. The voltage difference between the outputs of the first and second inverters depends primarily on transistor mismatch, and is of order of 100s of mV and so is easily measurable even in a noisy or poor quality test environment. Several applications of the new structure are presented.

A Web Tool for Interactive Exploration of Analog Design Tradeoffs

Financial concerns, design efficiency needs, and new and complex phenomena in submicron technologies have created a need for up-front (pre-schematic) analog design work. Analog designers need tools that allow them to be proactive and evaluate topology tradeoffs and promising approaches before lengthy and laborious simulation work begins. This paper presents a Web-based, automated method where a designer can interactively explore analog design tradeoffs, such as mismatch, gain, noise and other design parameters, across key circuit blocks and devices

High-performance analog/mixed-signal characterization techniques

•high-precision/performance analog/mixed-signal IP must be proven in silicon before it is ever designed into a product. •successful characterization of high-precision/performance analog/mixed-signal IP is hard and requires extreme attention to detail on all fronts. •best practices in each of the following areas have been presented: test chip design-lab set up and equipment-evaluation board design-data analysis •measured data from a 24-bit AFE for power metering (using the presented techniques) was presented — measurements indicate >20-bit dynamic range (un-averaged) and > 23 bit dynamic range (with averaging)

A Self-Amplifying Four-Transistor MOSFET Mismatch Test Structure

Mismatch can be difficult to monitor in a production test environment as it can be small and, therefore, it requires precise, time-consuming, costly measurements. This paper describes a four-transistor test structure for measurement and characterization of MOS transistor mismatch that self-amplifies the effect of mismatch, thereby generating a large and easily measurable dc output voltage. Test and design aspects of the structure are detailed, and several additional applications of the new structure are described.