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Brian Portland Doyle

Rafael Advanced Defense Systems

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Publication

Featured researches published by Brian Portland Doyle.

Archive | 2003

Multi-corner FET for better immunity from short channel effects

Rafael Rios; Jack Portland Kavalieros; Thomas Linton; Brian Portland Doyle

Archive | 2008

Auf-Chip-Speicherzelle und Verfahren zur Herstellung derselben On-chip memory cell and method for manufacturing the same

Suman Datta; Brian Portland Doyle; Jack Portland Kavalieros; Ali Portland Keshavarzi; Dinesh Somasekhar

Archive | 2006

Verfahren und Struktur zur Reduzierung des äusseren Widerstands eines dreidimensionalen Transistors durch Verwendung von Epitaxie-Schichten

Justin K. Brask; Robert Beaverton Chau; Suman Datta; Brian Portland Doyle; Jack Portland Kavalieros; Amlan Majumdar; Marko Radosavljevic

Archive | 2006

Verfahren zur Ausbildung eines FETs mit Struktur zur Reduzierung des äusseren Widerstands des dreidimensionalen Transistors durch Verwendung von Epitaxie-Schichten und Transistor A method for forming an FET with a structure for reducing the external resistance of the three-dimensional transistor by use of epitaxial layers and transistor

Justin K. Brask; Robert Beaverton Chau; Suman Datta; Brian Portland Doyle; Jack Portland Kavalieros; Amlan Majumdar; Marko Radosavljevic

Archive | 2006

Nicht-planare MOS-Struktur mit einer Strained-Channel-Region

Robert Beaverton Chau; Suman Datta; Brian Portland Doyle; Been-Yih Lake Oswego Jin

Archive | 2006

Verfahren und Struktur zur Reduzierung des äusseren Widerstands eines dreidimensionalen Transistors durch Verwendung von Epitaxie-Schichten Method and structure for reducing the external resistance of a three-dimensional transistor by using epitaxial layers

Justin K. Brask; Robert Beaverton Chau; Suman Datta; Brian Portland Doyle; Jack Portland Kavalieros; Amlan Majumdar; Marko Radosavljevic

Archive | 2006

Nicht-planare MOS-Struktur mit einer Strained-Channel-Region Non-planar MOS structure including a strained channel region

Robert Beaverton Chau; Suman Datta; Brian Portland Doyle; Been-Yih Lake Oswego Jin

Archive | 2005

Verfahren zur Fertigung einer Halbleiterstruktur (U-Gate-Transistor) A method of manufacturing a semiconductor structure (U-gate transistor)

Justin Portland Brask; Robert Beaverton Chau; Brian Portland Doyle; Uday Shah; Surinder Hillsboro Singh

Archive | 2005

Transistor und Verfahren zum Bilden desselben Of the same transistor and method of forming

Robert Beaverton Chau; Mark Beaverton Doczy; Brian Portland Doyle; Scott Hareland

Archive | 2005

Halbleiterbauelement mit einer lateral modulierten Gate-Austrittsarbeit und Herstellungsverfahren A semiconductor device having a laterally modulated gate work function and manufacturing processes

Robert Beaverton Chau; Mark Beaverton Doczy; Brian Portland Doyle; Scott Hareland

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Robert Beaverton Chau

Intel

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Suman Datta

University of Notre Dame

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Jack Portland Kavalieros

Rafael Advanced Defense Systems

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Justin Portland Brask

Intel

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Mark Beaverton Doczy

Intel

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Scott Hareland

Intel

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Uday Shah

Intel

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Amlan Majumdar

Intel

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Justin K. Brask

Intel

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Marko Radosavljevic

Intel

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