Brishbhan Singh Panwar
Indian Institute of Technology Delhi
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Featured researches published by Brishbhan Singh Panwar.
Semiconductor Science and Technology | 2013
Janesh K Kaushik; V. R. Balakrishnan; Brishbhan Singh Panwar; R. Muralidharan
The experimentally observed inverse temperature dependence of the reverse gate leakage current in AlGaN/GaN HEMT is explained using a virtual gate trap-assisted tunneling model. The virtual gate is formed due to the capture of electrons by surface states in the vicinity of actual gate. The increase and decrease in the length of the virtual gate with temperature due to trap kinetics are used to explain this unusual effect. The simulation results have been validated experimentally.
internaltional ultrasonics symposium | 2002
V. Prabhu; Brishbhan Singh Panwar; Priyanka
The evolutionary advantage of propagating the building blocks in the linkage learning genetic algorithm is used in the design of withdrawal weighted SAW filters. The representation of gene by a (locus, allele) pair and retaining a legal EPE-2 chromosome facilitates in bringing the building blocks closer during the crossover operation. The design of a withdrawal weighted SAW filter using LLGA predicts the reduction in computational time an order of magnitude smaller in comparison to genetic algorithm and other conventional methods.
Applied Physics Letters | 2002
Brishbhan Singh Panwar
The nonlinear analysis of the metal–insulator semiconductor shows that the ac currents charging the interface traps lead to large dc operating voltage and an inefficient operation of the monolithic convolvers. These interface traps are annihilated during a low temperature anneal, which utilizes hydrogen atoms implanted underneath the SiO2–Si interface. The overlay piezoelectric ZnO film in the metal–ZnO–Si3N4–SiO2–Si structure is protected from the influx of hydrogen atoms by an interposed silicon nitride layer. Hydrogen implantation and rapid thermal annealing steps are integrated in the process sequence of realizing an efficient metal–ZnO–Si3N4–SiO2–Si monolithic surface acoustic wave convolver.
international frequency control symposium | 2012
P. Varshney; Brishbhan Singh Panwar; Pradeep Kumar Rathore; Sylvain Ballandras; B. François; G. Martin; Jean-Michel Friedt; T. Rétornaz
Wireless sensing using SAW resonators calls for an accurate modeling and simulation of the charging and discharging of a resonator, connected to a resonant antenna (monopole/dipole) as a source/load. It is well known that a resonator takes about Q/π time periods of the natural resonant frequency to charge/discharge appreciably. The charging and discharging is critically affected by the static capacitance and the antenna impedance. The present work describes the theoretical modeling and experimental validation of the charging and discharging steps of a high Q SAW resonator in a wireless protocol and loading/unloading transients under variable load conditions are estimated. Furthermore, interrogation range using a monostatic RADAR-like reader (+10 dBm emitted power in the 434 MHz ISM band, -60 dBm detection limit) is estimated in air, dielectric media with or without conducting term, consistent with experimental measurements at 3 m in air when using a monopole antenna, 1! 2 m when using directive Yagi-Uda antenna on the interrogation unit (monopole on the sensor side), 40 cm in tap water, negligible distance in sea water.
Applied Physics Letters | 1990
Brishbhan Singh Panwar; A.B. Bhattacharyya
A post‐implant rapid thermal annealing technique is proposed to achieve very low interface trap density (<1010/eV cm2) at the SiO2‐Si interface in a metal‐Si3N4‐SiO2‐Si structure. The constitution of a donor layer induced by implanted hydrogen is explained with the aid of a model that predicts the formation of SiH groups. The proposed model is substantiated by comparing the IR data for furnace and rapid thermal annealed samples.
international conference on control applications | 2013
Pradeep Kumar Rathore; Brishbhan Singh Panwar
This paper reports on the design and optimization of a current mirror sensing based MOSFET embedded pressure sensor. A resistive loaded n-channel MOSFET based current mirror circuit integrated with a pressure sensing MOSFET was designed using standard 5 μηι CMOS technology. The piezoresistive effect in MOSFET has been exploited for the calculation of strain induced carrier mobility variation under externally applied pressure. The channel region of the active MOSFET forms a flexible diaphragm of size 100 μm × 100 μm × 2.5 μm which deflects under applied pressure. Finite element method based COMSOL Multiphysics is utilized for the simulation of pressure sensor. T-Spice is employed to evaluate the characteristics of the current mirror pressure sensing circuitry. Simulation results show that the MOSFET embedded pressure sensor has a sensitivity of approx. 10.01 mV/MPa. The pressure sensing structure has been optimized for enhancing the sensor sensitivity to approx. 473 mV/MPa. In addition, the variation in the drain currents of the current mirror MOSFETs due to the (a) mismatch of the active and passive devices, and (b) variations in operating temperature and supply voltage have also been investigated.
IEEE Transactions on Electron Devices | 2013
Janesh K Kaushik; V Raman Balakrishnan; Brishbhan Singh Panwar; R. Muralidharan
An explanation for the observed drain current collapse in AlGaN/GaN high electron mobility transistors is presented. The drain current-voltage (I-V) characteristics which show this undesirable behavior have been modeled using the physics-based ATLAS device simulator by Silvaco. A basic theory for the determination of virtual gate length for a three terminal device has been developed and used in the simulation. The simulated I-V characteristics closely match the experimental results. This paper suggests a model based on formation of a high resistance region under the virtual gate in the 2-D electron gas channel. The resistance of this region changes abruptly at a critical lateral electric field due to application of drain-source voltage. This abrupt change has been found to be a function of channel temperature. The dynamic behavior of this high resistance region has been proposed to be the cause of drain current collapse.
Semiconductor Science and Technology | 2006
Gagan Khanduri; Brishbhan Singh Panwar
The effects of two different base doping profiles on the current gain and cut-off frequency for all levels of current injection have been studied for NPN Si/SiGe/Si double heterojunction bipolar transistors (SiGe DHBTs). The two-dimensional simulation results for a SiGe DHBT with uniform base doping and a fixed base Gummel number are compared with a non-uniform base doping profile SiGe drift-DHBT device. The study explains the performance of SiGe HBTs at different injection levels by analysing the electron and hole mobility, drift velocity, electric field, junction capacitances and intrinsic and extrinsic base region conductivities. The base doping profile in the SiGe drift-DHBT is controlled in such a way that it creates a net accelerating drift field in the quasi-neutral base for minority electrons. This accelerating field subsequently improves the current gain and cut-off frequency for the SiGe drift-DHBT in comparison with the SiGe DHBT for all levels of injection.
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control | 2005
Priyanka; Shiv Dutt Joshi; Brishbhan Singh Panwar
Present work proposes an iterative technique to estimate reflection weighting function and transduction weighting function simultaneously to achieve a desired single-phase unidirectional transducer (SPUDT) response. The technique uses the p-matrix formulation in order to describe characteristics of a SPUDT. Simulation results are presented to show the validity of the approach.
Advanced Materials Research | 2013
Pradeep Kumar Rathore; Brishbhan Singh Panwar
This paper reports on the design and optimization of current mirror MOSFET embedded pressure sensor. A current mirror circuit with an output current of 1 mA integrated with a pressure sensing n-channel MOSFET has been designed using standard 5 µm CMOS technology. The channel region of the pressure sensing MOSFET forms the flexible diaphragm as well as the strain sensing element. The piezoresistive effect in MOSFET has been exploited for the calculation of strain induced carrier mobility variation. The output transistor of the current mirror forms the active pressure sensing MOSFET which produces a change in its drain current as a result of altered channel mobility under externally applied pressure. COMSOL Multiphysics is utilized for the simulation of pressure sensing structure and Tspice is employed to evaluate the characteristics of the current mirror pressure sensing circuit. Simulation results show that the pressure sensor has a sensitivity of 10.01 mV/MPa. The sensing structure has been optimized through simulation for enhancing the sensor sensitivity to 276.65 mV/MPa. These CMOS-MEMS based pressure sensors integrated with signal processing circuitry on the same chip can be used for healthcare and biomedical applications.