Byoung-Deog Choi
Samsung
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Publication
Featured researches published by Byoung-Deog Choi.
Journal of Applied Physics | 2007
Sungwook Jung; Jaehong Kim; Hyukjoo Son; Sunghyun Hwang; Kyungsoo Jang; J.H. Lee; Kwangsoo Lee; Hyung Jun Park; Kyunghae Kim; Junsin Yi; Ho-Kyoon Chung; Byoung-Deog Choi; Ki-Yong Lee
A nonvolatile semiconductor memory (NVSM) device with a metal-oxide-nitride-oxynitride-polysilicon (MONOS) structure on a rough polysilicon (poly-Si) surface was fabricated using a low-temperature process and poly-Si thin film transistor (TFT) technology on glass. For the fabrication of the NVSM device on glass, plasma-assisted oxynitridation was carried out using nitrous oxide (N2O) as a reactive gas, due to the very rough surface of the poly-Si on glass annealed using an excimer laser. The ultrathin SiOxNy films obtained using the N2O plasma have a very uniform distribution on poly-Si and similar contents of oxygen and nitrogen in the peaks and valleys of the grains. The NVSM devices having a MONOS structure with a tunneling layer of ultrathin SiOxNy on glass have suitable switching and charge retention characteristics for data storage. The results demonstrate that the NVSM device made using low-temperature poly-Si TFT technology on glass reported in this paper can be used in various types of display de...
SID Symposium Digest of Technical Papers | 2006
Jung Han Yoon Park; W. J. Nam; J.H. Lee; Moon Ku Han; K. Y. Lee; Byoung-Deog Choi; K. J. Yoo; Hyun-Soo Park
We have investigated a short channel (L μm) effect on an electrical reliability in low temperature poly-Si (LTPS) thin film transistor (TFT) employing excimer laser annealing (ELA). The decrease of threshold voltage due to the drain induced barrier lowering (DIBL) is observed in p-type poly-Si TFT without lightly doped drain (LDD). In the n-type poly-Si TFT with LDD, the threshold voltage is slightly decreased when a large drain bias is applied. The field effect mobility is observed on various channel length and LDD. The series resistance due to the LDD in the short channel LTPS is decreased the field effect mobility. The operating temperature dependence of the electrical characteristics is investigated. As the temperature is increase, the poly-Si TFTs characteristics is improved due to the increase the thermally activated carriers. We have investigated a reliability of short channel poly-Si TFT. The degradation of short channel poly-Si TFT under the hot carrier stress is dominant to interface state.
Journal of The Korean Institute of Electrical and Electronic Material Engineers | 2006
Jun-Sik Kim; Ho-Kyoon Chung; Byoung-Deog Choi; Ki-Yong Lee; Junsin Yi
Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.
MRS Online Proceedings Library Archive | 2005
Dong-Wook Choi; Byoung-Deog Choi; Jae-Wan Jung; Hyun-Sun Park; J. W. Seo; K. Y. Lee; Hyun-Woo Chung
In this paper, we present the results of Plasma Enhanced Chemical Vapor Deposition gate oxide (SiO 2 ) integrity on ELC (excimer laser crystallized), MILC (metal induced lateral crystallized) and SPC (solid phase crystallized) polysilicon films. We observed that gate oxide strength of poly Si TFT strongly depends on the crystallization method for the active silicon layer. In the case of ELC films, asperities on the silicon surface reduce the SiO 2 breakdown field significantly. The metallic contaminants in MILC films are responsible for a deleterious impact on gate oxide integrity. Among the three cases, the SiO 2 breakdown field was the highest for the SPC silicon films. The breakdown fields at the 50% failure points in Weibull plots for the ELC, MILC and SPC cases were 5.1MV/cm, 6.2MV/cm, 8.1MV/cm, respectively. We conclude that the roughness and metallic contamination of the poly Si films are the main factors that cause en-hanced breakdown of SiO 2 films.
Archive | 2007
Jongyun Kim; Byoung-Deog Choi
Archive | 2012
Jongyun Kim; Byoung-Deog Choi
Archive | 2007
Jongyun Kim; Byoung-Deog Choi
Archive | 2008
Yun-Gyu Lee; Byoung-Deog Choi; Hye-Hyang Park; Ki-Ju Im
Archive | 2010
Jin-Ho Oh; Jeong-hee Park; Man-sug Kang; Byoung-Deog Choi; Gyu-Hwan Oh; Hye-young Park; Doo-Hwan Park
Archive | 2007
Hye-Hyang Park; Byoung-Deog Choi