C. E. Reinhardt

Fabrication of Pillar-structured thermal neutron detectors

Pillar detector is an innovative solid state device structure that leverages advanced semiconductor fabrication technology to produce a device for thermal neutron detection. State-of-the-art thermal neutron detectors have shortcomings in achieving simultaneously high efficiency, low operating voltage while maintaining adequate fieldability performance. By using a 3-dimensional silicon PIN diode pillar array filled with isotopic boron 10, (10B) a high efficiency device is theoretically possible. The fabricated pillar structures reported in this work are composed of 2 mum diameter silicon pillars with a 4 mum pitch and pillar heights of 6 and 12 mum. The pillar detector with a 12 mum height achieved a thermal neutron detection efficiency of 7.3% at 2 V.

X-ray photoemission analysis of chemically treated GaTe semiconductor surfaces for radiation detector applications

The surface of the layered III-VI chalcogenide semiconductor GaTe was subjected to various chemical treatments commonly used in device fabrication to determine the effect of the resulting microscopic surface composition on transport properties. Various mixtures of H3PO4:H2O2:H2O were accessed and the treated surfaces were allowed to oxidize in air at ambient temperature. High-resolution core-level photoemission measurements were used to evaluate the subsequent chemistry of the chemically treated surfaces. Metal electrodes were created on laminar (cleaved) and nonlaminar (cut and polished) GaTe surfaces followed by chemical surface treatment and the current versus voltage characteristics were measured. The measurements were correlated to understand the effect of surface chemistry on the electronic structure at these surfaces with the goal of minimizing the surface leakage currents for radiation detector devices.

Planarization of high aspect ratio p-i-n diode pillar arrays for blanket electrical contacts

Two planarization techniques for high aspect ratio three dimensional pillar structured p-i-n diodes have been developed in order to enable a continuous coating of metal on the top of the structures. The first technique allows for coating of structures with topography through the use of a planarizing photoresist followed by reactive ion etch-back to expose the tops of the pillar structure. The second technique also utilizes photoresist but instead allows for planarization of a structure in which the pillars are filled and coated with a conformal coating by matching the etch rate of the photoresist to the underlying layers. These techniques enable deposition using either sputtering or electron beam evaporation of metal films to allow for electrical contact to the tops of the underlying pillar structure. These processes have potential applications for many devices comprised of three dimensional high aspect ratio structures.

Pillar structured thermal neutron detector

This work describes an innovative solid state device structure that leverages advanced semiconductor fabrication technology to produce an efficient device for thermal neutron detection which we have coined the ¿Pillar Detector¿. State-of-the-art thermal neutron detectors have shortcomings in simultaneously achieving high efficiency, low operating voltage while maintaining adequate fieldability performance. By using a three dimensional silicon PIN diode pillar array filled with isotopic 10boron (10B), a high efficiency device is theoretically possible. Here we review the design considerations for going from a 2-D to 3-D device and discuss the materials trade-offs. The relationship between the geometrical features and efficiency within our 3-D device is investigated by Monte Carlo radiation transport method coupled with finite element drift-diffusion carrier transport simulations. To benchmark our simulations and validate the predicted efficiency scaling, experimental results of a prototype device are illustrated. The fabricated pillar structures reported in this work are composed of 2 ¿m diameter silicon pillars with a 2 ¿m spacing and pillar height of 12 ¿m. The pillar detector with a 12 ¿m height achieved a thermal neutron detection efficiency of 7.3% at a reverse bias of - 2 V.

Exploration of GaTe for gamma detection

The layered III-VI semiconductor Gallium Telluride has potential for room temperature gamma ray spectroscopy applications due to its band gap of 1.67 eV, and average atomic number of 45 : 31 (Ga) and 52 (Te). The physical properties of GaTe are highly anisotropic due to covalent bonding within the layer and van der Waals bonding between layers. This work reports the results of surface and bulk processing, surface characterization, and electrical characterization of diodes formed on both the laminar and non-laminar GaTe surfaces. Alpha detection measurements were also performed.

PASSIVATION OF SEMICONDUCTOR SURFACES FOR IMPROVED RADIATION DETECTORS: X-RAY PHOTOEMISSION ANALYSIS

Surface passivation of device-grade radiation detector materials was investigated using x-ray photoelectron spectroscopy in combination with transport property measurements before and after various chemical treatments. Specifically Br-MeOH (2% Br), KOH with NH{sub 4}F/H{sub 2}O{sub 2} and NH{sub 4}OH solutions were used to etch, reduce and oxidize the surface of Cd{sub (1-x)}Zn{sub x}Te semiconductor crystals. Scanning electron microscopy was used to evaluate the resultant microscopic surface morphology. Angle-resolved high-resolution photoemission measurements on the valence band electronic structure and core lines were used to evaluate the surface chemistry of the chemically treated surfaces. Metal overlayers were then deposited on these chemically treated surfaces and the I-V characteristics measured. The measurements were correlated to understand the effect of interface chemistry on the electronic structure at these interfaces with the goal of optimizing the Schottky barrier height for improved radiation detector devices.