C.H. Ling

Bias and thermal annealings of radiation-induced leakage currents in thin-gate oxides

The effects of bias annealing and thermal annealing on radiation-induced leakage currents (RILC) in thin-gate oxides (4.5 nm) have been studied. To decouple these two effects, we have performed the bias annealing at room temperature and the thermal annealing at elevated temperatures without bias. RILC has been found to decrease after both bias and thermal annealings. We have also observed that the decrease of RILC during bias annealing was greatly enhanced in a hydrogen ambient. This evidence strongly indicates that trapped holes contribute significantly to RILC and suggests that the bias annealing of RILC was likely due to the annealing of trapped holes.

A comparative study of radiation- and stress-induced leakage currents in thin gate oxides

Low-field leakage currents in thin gate oxides can be induced by 10 keV x-ray irradiation and electrical stress. The characteristics of radiation-induced leakage current (RILC) and stress-induced leakage current (SILC) in thin oxides have been studied and compared. The characteristics of RILC are found to be very similar to SILC, indicating that both RILC and SILC have essentially the same conduction mechanism, and are contributed by common defects generated in the gate oxides during irradiation or electrical stress. In particular, it has been demonstrated that oxide-trapped holes contribute significantly to both RILC and SILC.

Origin of temperature-sensitive hole current at low gate voltage regime in ultrathin gate oxide

The carrier-separation characteristics of a p-channel metal–oxide–semiconductor field-effect transistor with 29 A gate oxide has been measured at various temperatures from 90 to 375 K. It is found that the gate and source/drain currents at low gate voltage regime (below 0.5 V) were correlated and strongly dependent on temperature above 250 K. The earlier observation has been attributed to the existence of a temperature-sensitive hole direct-tunneling current due to the strong temperature sensitivity of surface hole’s concentration at low voltage regime.

On the time-dependent degradation of LDD n-MOSFETs under hot-carrier stress

Abstract A unified model for hot-carrier-induced degradation in LDD n-MOSFETs is presented. A novel oxide spacer charge pumping method enables interface trap generation in the spacer and overlap/channel regions to be distinctly separated. An excellent correlation between trap generation in the spacer region and linear drain current degradation at high gate voltage is observed. Moreover, trap generation in the overlap/channel region is found to correlate well with linear drain current degradation at low gate voltage. The results point unambiguously to a two-mechanism degradation model involving drain resistance increase by trap generation in the spacer region, and carrier mobility reduction by trap generation in the overlap/channel region. The combined effect of a time-independent lateral electron temperature profile and a finite density of interface trap precursors within the LDD region leads to a self-limiting degradation behavior. This insight forms the basis of a time-dependent trap generation model, which indicates the existence of a single degradation curve. The fact that the degradation curves at different stress drain voltages fall onto a time-scaled version of the single degradation curve provides strong support for the model. This also offers a straightforward and yet accurate means by which the hot-carrier lifetime corresponding to a specific failure criterion may be extracted. Finally, a power-law relationship between hot-carrier lifetime and substrate current is also observed for the LDD devices, thus preserving the physical essence based on which earlier lifetime models for conventional drain devices are established.

Determination of LDD MOSFET drain resistance from device simulation

Abstract A simple, efficient and accurate technique for the determination of the drain resistance of LDD MOSFETs, using a two-dimensional device simulator, is presented. This method does not require the artificial introduction of constraints that would alter the normal operating conditions and geometry of the device. Comparison is made with a more elaborate technique, where the drain region is modelled as a network of resistances. For an appropriately chosen mesh size, good agreement to within 10% has been achieved for the two techniques. In terms of computational labour, the simple technique enjoys at least an order of magnitude advantage compared with the more elaborate model. The two techniques have also been used to study the dependence of the drain resistance on the gate and the drain bias, and to establish the accuracy over a broad bias range. An estimate is also made of the degradation of the drain resistance due to hot-carrier stress.

A comparison between leakage currents in thin gate oxides subjected to X-ray radiation and electrical stress degradation

Abstract Thin gate oxides, irradiated under conditions similar to those experienced in X-ray lithography, exhibit a large increase in the leakage current. The current–voltage characteristics of the radiation-induced leakage current (RILC) and the electrical stress-induced leakage current (SILC) are very similar. Both currents comprise a dc component due to trap-assisted tunneling, and a transient component attributed to the tunnel charging/discharging of carriers. Current–voltage and current–time data suggest essentially the same degradation mechanisms for both the RILC and SILC in ultra-thin oxides. A quadratic relationship between the X-ray dose and the equivalent charge fluence that induces the same amount of degradation is established.

Radiation and electrical stress-induced hole trap-assisted tunneling currents in ultrathin gate oxides

Abstract Based on carrier-separation measurement on pMOSFET, we show the existence of hole trap-assisted tunneling (HTAT) current after 10 keV X-ray irradiation on ultrathin gate oxide. The characteristics of this current have been studied in detail and compared with the corresponding current due to electrical stress. No essential difference is found between the HTAT currents due to ionizing radiation and electrical stress. The results indicate that these two currents have similar origin.

Reduction of Radiation-Induced Leakage Currents in Thin Oxides by Application of a Low Post-Irradiation Gate Bias

We have observed that excess low-field leakage currents generated by 10 keV X-ray irradiation in thin gate oxides (4.5 nm) could be reduced by applying a low gate bias to the oxides after irradiation, regardless of the polarity of the applied gate bias. The reduction rate of radiation-induced leakage current (RILC) increased with the applied gate bias and began to saturate after 105 s. In addition, the reduction rate of RILC was significantly enhanced in a H2 ambient, suggesting a strong link between the reduction of RILC and trapped-hole annealing.

A diffusion model for carrier transport in a polycrystalline film

Abstract A model for carrier transport across the grain boundary of a polycrystalline film is developed, based on a diffusion mechanism and a constant inherent mobility in the space charge region. A linear current-voltage relation is obtained, valid for small applied bias. An effective mobility is derived for the neutral crystallite-space charge composite region, which is believed to be a more accurate description of the mobility behaviour than the exp (− vb) expression. Also, a drift velocity distribution is obtained, showing a maximum at the grain boundary, but falling off rapidly away from the space charge region, in particular, at large barrier potentials. The diminishing role of the grain boundary in limiting the effective mobility as grain size increases is demonstrated. Our theory also provides a new interpretation to the low mobility as observed from Hall-conductivity measurements.

Characterization of leakage current in thin gate oxide subjected to 10 keV X-ray irradiation

Two components of the low-field current have been identified in thin oxides, following 10 KeV X-ray irradiation. The first component, observed in the direct tunneling region, can be removed by a 100/spl deg/C anneal, and is also greatly suppressed if the irradiation is done in vacuum or in a nitrogen ambient, or if the oxide is preannealed before irradiation. The origin of this current is speculated to be related to adsorbed water molecules on the gate surface. The second component is observed to begin in the pre-Fowler-Nordheim tunneling (FNT) region and extends into the FNT region, only in oxides less than /spl sim/8 nm thick, and persists even after several days of anneal at 300/spl deg/C. This current exhibits a power law dependence on radiation dose. The origin of this second component is believed to be due to the trap-assisted tunneling via neutral electron traps, similar to the leakage current observed in the oxide after high-voltage stress.