C. L. Andre

Dual junction GaInP/GaAs solar cells grown on metamorphic SiGe/Si substrates with high open circuit voltage

Dual junction GaInP/GaAs solar cells have been grown and fabricated on Si substrates using relaxed, compositionally graded SiGe buffer layers that provide a nearly lattice-matched low threading dislocation Ge surface for subsequent cell growth. The dual junction cells on SiGe/Si displayed high open circuit voltages in excess of 2.2 V, compared to 2.34 V for control cells on GaAs, that are consistent with maintaining the 1.8/spl times/10/sup 6/ cm/sup -2/ threading dislocation density throughout the cell structure. Even with total current output limited by large grid coverage and high reflectance, total area AM1.5G efficiency is 16.8%, with active area efficiency at 18.6%. The high V/sub oc/ establishes that SiGe metamorphic buffers are viable for integrating III-V multijunction cells on Si in a monolithic process.

Impact of dislocation densities on n+∕p and p+∕n junction GaAs diodes and solar cells on SiGe virtual substrates

Recent experimental measurements have shown that in GaAs with elevated threading dislocation densities (TDDs) the electron lifetime is much lower than the hole lifetime [C. L. Andre, J. J. Boeckl, D. M. Wilt, A. J. Pitera, M. L. Lee, E. A. Fitzgerald, B. M. Keyes, and S. A. Ringel, Appl. Phys. Lett. 84, 3884 (2004)]. This lower electron lifetime suggests an increase in depletion region recombination and thus in the reverse saturation current (J0 for an n+∕p diode compared with a p+∕n diode at a given TDD. To confirm this, GaAs diodes of both polarities were grown on compositionally graded Ge∕Si1−xGex∕Si (SiGe) substrates with a TDD of 1×106cm−2. It is shown that the ratio of measured J0 values is consistent with the inverse ratio of the expected lifetimes. Using a TDD-dependent lifetime in solar cell current–voltage models we found that the Voc, for a given short-circuit current, also exhibits a poorer TDD tolerance for GaAs n+∕p solar cells compared with GaAs p+∕n solar cells. Experimentally, the open-ci...

Impact of dislocations on minority carrier electron and hole lifetimes in GaAs grown on metamorphic SiGe substrates

The minority carrier lifetime of electrons (τn) in p-type GaAs double heterostructures grown on GaAs substrates and compositionally graded Ge/Si1−xGex/Si (SiGe) substrates with varying threading dislocation densities (TDDs) were measured at room temperature using time-resolved photoluminescence. The electron lifetimes for homoepitaxial GaAs and GaAs grown on SiGe (TDD∼1×106 cm−2) with a dopant concentration of 2×1017 cm−3 were ∼21 and ∼1.5 ns, respectively. The electron lifetime measured on SiGe was substantially lower than the previously measured minority carrier hole lifetime (τp) of ∼10 ns, for n-type GaAs grown on SiGe substrates with a similar residual TDD and dopant concentration. The reduced lifetime for electrons is a consequence of their higher mobility, which yields an increased sensitivity to the presence of dislocations in GaAs grown on metamorphic buffers. The disparity in dislocation sensitivity for electron and hole recombination has significant implications for metamorphic III-V devices.

Deep level defects in proton radiated GaAs grown on metamorphic SiGe/Si substrates

The effect of 2MeV proton radiation on the introduction of deep levels in GaAs grown on compositionally graded SiGe∕Si substrates was investigated using deep level transient spectroscopy (DLTS). Systematic comparisons were made with identical layers grown on both GaAs and Ge substrates to directly assess the influence of threading dislocations on radiation-related deep levels for both n-type and p-type GaAs. DLTS revealed that for p+n structures, proton irradiation generates electron traps at Ec−0.14eV, Ec−0.25eV, Ec−0.54eV, and Ec−0.72eV in the n‐GaAs base, and, for n+p structures, radiation-induced hole traps appear at Ev+0.18eV, Ev+0.23eV, Ev+0.27eV, and Ev+0.77eV in the p-type GaAs base, irrespective of substrate choice for both polarities. The primary influence of substituting SiGe∕Si substrates for conventional GaAs and Ge substrates is on the introduction rates of the individual traps as a function of proton radiation fluence. Substantially reduced concentrations are found for each radiation-induce...

High-performance In/sub 0.53/Ga/sub 0.47/As thermophotovoltaic devices grown by solid source molecular beam epitaxy

In/sub 0.53/Ga/sub 0.47/As-based monolithic interconnected modules (MIMs) of thermophotovoltaic (TPV) devices lattice-matched to InP were grown by solid source molecular beam epitaxy. The MIM device consisted of ten individual In/sub 0.53/Ga/sub 0.47/As TPV cells connected in series on an InP substrate. An open-circuit voltage (V/sub oc/) of 4.82 V, short-circuit current density (J/sub sc/) of 1.03 A/cm/sup 2/ and fill factor of /spl sim/73% were achieved for a ten-junction MIM with a bandgap of 0.74 eV under high intensity white light illumination. Device performance uniformity was better than 1.5% across a full 2-in InP wafer. The V/sub oc/ and J/sub sc/ values are the highest yet reported for 0.74-eV band gap n-p-n MIM devices.

Multi-junction III-V photovoltaics on lattice-engineered Si substrates

Dual junction (DJ) In/sub 0.49/Ga/sub 0.51/P/GaAs solar cells were grown on compositionally graded Ge/Se/sub 1-x/Ge/sub x//Si (SiGe), fabricated and characterized. The DJ solar cells exhibited open-circuit voltage (V/sub OC/) values in excess of 2 V for both AM0 and AM1.5 illumination. The high V/sub OC/ values result from maintaining very low defect densities in these highly lattice-mismatched structures by using SiGe graded layers and monolayer-scale control over the III-V/Ge interface formation. Comparisons made with identical cells grown on GaAs substrates reveal that the DJ solar cell on SiGe retained 91% of the V/sub OC/ and 99% of the short circuit current density achieved by the homoepitaxial DJ cell, demonstrating the potential for high efficiency multi-junction solar cells grown on SiGe. In addition, modeling shows that In/sub 0.49/Ga/sub 0.51/P/GaAs DJ cells should be more tolerant of the low residual dislocation densities characteristic of lattice-engineered SiGe substrates than single junction GaAs cells, indicating great promise for achieving a high efficiency III-V multijunction cell technology on Si.

Low-temperature GaAs films grown on Ge and Ge/SiGe/Si substrates

The growth and structural properties of low-temperature GaAs (LT-GaAs) films grown on Ge/SiGe/Si substrates using solid-source molecular-beam epitaxy were investigated. Identical structures were also grown on both Ge and GaAs substrates in order to ascertain the effects of heterovalent interfaces, lattice mismatch, and surface morphology on the structural properties and excess As incorporation of LT-GaAs. Triple-axis x-ray diffraction measurements revealed nearly identical lattice expansion due to excess As incorporation for LT-GaAs layers on all substrates, with the excess As concentration estimated to be 0.34%. Subsequent in situ annealing resulted in complete layer relaxation coupled with the formation of randomly distributed As precipitates of similar sizes throughout the LT-GaAs layers on each substrate as determined by transmission electron microscopy. Secondary ion mass spectroscopy measurements confirmed the incorporation of excess As to be identical for growth on each substrate type, indicating t...

Impact of threading dislocations on both n/p and p/n single junction GaAs cells grown on Ge/SiGe/Si substrates

Single junction GaAs solar cells having an n/p polarity were grown on p-type Ge/SiGe/Si substrates for the first time. The cell performance and material properties of these n/p cells were compared with p/n cells grown on n-type Ge/SiGe/Si substrates for which record high minority carrier hole lifetimes of 10 ns and open circuit voltages (V/sub oc/) greater than 980 mV (AM0) were achieved. The initial n/p experimental results and correlations with theoretical predictions have indicated that for comparable threading dislocation densities (TDD), n/p cells have longer minority carrier diffusion lengths, but reduced minority carrier lifetimes for electrons in the p-type GaAs base layers. This suggests that a lower TDD tolerance exists for n/p cells compared to p/n cells, which has implications for the optimization of n/p high efficiency cell designs using alternative substrates.

III-V Multi-Junction Materials and Solar Cells on Engineered SiGe/Si Substrates

The monolithic integration of high efficiency III-V compound solar cell materials and devices with lower-cost, robust and scaleable Si substrates has been a driving force in photovoltaics (PV) basic research for decades. Recent advances in controlling mismatch-induced defects that result from structural and chemical differences between III-V solar cell materials and Si using a combination of SiGe interlayers and monolayer-scale control of III-V/IV interfaces, have led to a series of fundamental advances at the material and device levels, which establish that the great potential of III-V/Si PV is within reach. These include demonstrations of GaAs epitaxial layers on Si that are anti-phase domain-free with verified dislocation densities at or below 1×10 6 cm −2 and negligible interface diffusion, minority carrier lifetimes for GaAs on Si in excess of 10 ns, single junction GaAs-based solar cells on Si with open circuit voltages ( V oc ) in excess of 980 mV, efficiencies beyond 18%, and area-independent PV characteristics up to at least 4 cm 2 . These advances are attributed in large part to the use of a novel “engineered Si substrate” based on compositionally-graded SiGe buffers such that a high-quality, low defect density, relaxed, “virtual” Ge substrate could be developed that can support lattice-matched III-V epitaxy and thus merge III-V technology based on the GaAs (or Ge) lattice constant with Si wafers. This paper focuses on recent results that extend this work to the first demonstration of high performance III-V dual junction solar cells on SiGe/Si. Open circuit voltages in excess of 2 V at one-sun have been obtained for the conventionally “lattice-matched” In 0.49 Ga 0.51 P/GaAs dual junction cells on inactive, engineered SiGe/Si; to our knowledge is the first demonstration of > 2V solar power generation on a Si wafer. Comparisons with identical cells on GaAs substrates reveal that the V oc on engineered Si retains more than 94% of its homoepitaxial value, and that at present both DJ/GaAs and DJ/SiGe/Si cells are similarly limited by current mismatch in these early cells, and not fundamental defect factors associated with the engineered Si substrates.

Impact of annealing and V:III ratio on properties of MBE grown wide-bandgap AlGaInP materials and solar cells

The growth and properties of wide bandgap (Al/sub x/Ga/sub 1-x/)/sub 0.51/In/sub 0.49/P layers and solar cells grown by solid source molecular beam epitaxy were examined to correlate the impact of growth conditions and in-situ annealing on photovoltaic performance. A P/sub 2/:III flux ratio of 12 was found to optimize the optical qualities of Ga/sub 0.51/In/sub 0.49/P epilayers. Ga/sub 0.51/In/sub 0.49/P solar cells were grown and subjected to different in-situ annealing conditions. The effect of annealing on material quality and device performance was characterized through deep level transient spectroscopy (DLTS) and photoluminescence (PL), which revealed a trend in non-radiative recombination. The results suggest that removal of a deep level near E/sub C/ - 0.78 eV in the n-type base is responsible for the observed improvement in current collection seen after anneal. After refinement of the Ga/sub 0.51/In/sub 0.49/P growth, wider bandgap material was investigated for future use in a high temperature/high intensity solar cell. A range of (Al/sub x/Ga/sub 1-x/)/sub 0.51/In/sub 0.49/P materials, with direct bandgaps from 2.09 eV to 2.26 eV have been successfully demonstrated using digital alloying and conventional bulk growth.