Cécile Belleudy
University of Nice Sophia Antipolis
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Publication
Featured researches published by Cécile Belleudy.
embedded and ubiquitous computing | 2010
Khurram Bhatti; Cécile Belleudy; Michel Auguin
This paper considers the problem of power/energy minimization for periodic real-time tasks that are scheduled over multiprocessor platforms that have dynamic power management (DPM) and dynamic voltage & frequency scaling (DVFS) capabilities. Early research reports that while both DPM and DVFS policies perform well individually for a specific set of conditions, they often outperform each other under different workload and/or architecture configuration. Thus, no single policy fits perfectly all operating conditions. Instead of designing new policies for specific operating conditions, this paper proposes a generic power management scheme, called the Hybrid Power Management (HyPowMan) scheme. This scheme takes a set of well-known existing (DPM and DVFS) policies, each of which performs well for a given set of conditions, and adapts at runtime to the best-performing policy for any given workload. We performed experiments with state-of the-art DPM and DVFS techniques and results show that HyPowMan scheme adapts well to the changing workload and always achieves overall energy savings comparable to the best-performing policy at any point in time.
Eurasip Journal on Embedded Systems | 2012
Andrea Castagnetti; Alain Pegatoquet; Cécile Belleudy; Michel Auguin
AbstractWireless sensor networks (WSNs) require an extremely energy-efficient design. As sensor nodes have limited power sources, the problem of autonomy is crucial. Energy harvesting provides a potential solution to this problem. However, as current energy harvesters produce only a small amount of energy and their storage capacity is limited, efficient power management techniques must also be considered. In this article we address the problem of modeling and simulating energy harvesting WSN nodes with efficient power management policies. We propose furthermore a framework that permits to describe and simulate an energy harvesting sensor node by using a high level modeling approach based on power consumption and energy harvesting. The node architectural parameters as well as the on-line power management techniques will also be specified. Two new power management architectures will be introduced, taking into account energy-neutral and negative-energy conditions. Simulations results show that the throughput of a sensor node can be improved up to 50% when compared to a state of the art power management algorithm for solar harvesting WSN. The simulation framework is then used to find an efficient system sizing for a solar energy harvesting WSN node.
ACM Transactions on Design Automation of Electronic Systems | 1997
Laurent Freund; Michel Israël; Frédéric Rousseau; J. M. Bergé; Michel Auguin; Cécile Belleudy; Guy Gogniat
Hardware/Software codesign approaches consist generally in Hw/Sw partitioning and scheduling, constrained code generation, hardware and interface synthesis. This paper presents the codesign of an industrial experiment in acoustic echo cancellation (GMDFa algorithm) and emphasizes the partitioning and communication synthesis steps. This experiment points out interesting problems such as data and programs distribution between system memories and modeling communications in the partitioning process.
Real-time Systems | 2011
Muhammad Khurram Bhatti; Cécile Belleudy; Michel Auguin
Energy-aware scheduling of real time applications over multiprocessor systems is considered in this paper. Early research reports that while various energy-saving policies, for instance Dynamic Power Management (DPM) and Dynamic Voltage & Frequency scaling (DVFS) policies, perform well individually for a specific set of operating conditions, they often outperform each other under different workload and/or architecture configuration. Thus, no single policy fits perfectly all operating conditions. Instead of designing new policies for specific operating conditions, this paper proposes a generic power/energy management scheme that takes a set of well-known existing (DPM and DVFS) policies, each of which performs well for a set of conditions, and adapts at runtime to the best-performing policy for any given workload. Experiments are performed using state-of the-art DPM and DVFS policies and the results show that our proposed scheme adapts well to the changing workload and always achieves overall energy savings comparable to that of best-performing policy at any point in time.
conference on design and architectures for signal and image processing | 2010
Muhammad Khurram Bhatti; Cécile Belleudy; Michel Auguin
In this paper1, we have addressed energy-efficient scheduling of real time applications intended to be executed on multiprocessor systems. Our proposed technique, called Deterministic Stretch-to-Fit (DSF) technique, is based on inter-task real time dynamic voltage and frequency scaling (RT-DVFS). It mainly comprises of three components. Firstly, we propose an online algorithm to reclaim energy by adapting to the variations in actual workload of target application tasks. Secondly, we extend our online algorithm with an adaptive and speculative speed adjustment mechanism. This mechanism anticipates early completion of future task instances based on the information of their average workload. Thirdly, we propose a one-task extension technique for multi-task multiprocessor systems. No real time constraints of target application are violated while applying our proposed technique. Simulation results show that our online slack reclamation algorithm alone gives up to 53% gains on energy consumption and our extended speculative speed adjustment mechanism, along with the one-task extension technique, gives additional gains, reaching a theoretical low-bound on the scalable frequency and voltage.
personal, indoor and mobile radio communications | 2013
Trong Nhan Le; Alain Pegatoquet; Olivier Sentieys; Olivier Berder; Cécile Belleudy
Exploiting energy from the environment to extend the system lifetime of Wireless Sensor Network (WSN), especially thermal energy, is considered as a promising approach. When considering self-powered systems, the Power Manager (PM) plays an important role in energy harvesting WSNs. Instead of minimizing the consumed energy as in the case of battery-powered systems, it causes the harvesting node to converge to Energy Neutral Operation (ENO) in order to achieve a theoretically infinite lifetime. In this paper, a low complexity PM for a thermal-powered WSN is presented. Our PM adapts the duty cycle of the node according to the estimation of harvested energy and the consumed energy provided by a simple energy monitor for a super capacitor based WSN to achieve the ENO. Experiments are performed on a real WSN platform where harvested energy is extracted from the wasted heat of a PC adapter by two thermoelectric generators.
digital systems design | 2010
Andrea Castagnetti; Cécile Belleudy; Sébastien Bilavarn; Michel Auguin
A lot of task scheduling algorithms and power management policies have been developed based on simplistic power models, which rarely take into account the effects of the power consumptions of the different components of a real system. Most of the models on which the study of the DVFS scheduling is based, make the assumption that the power consumption of a processor could be modelled as a E ∝ V 2 model. This hypothesis, even if partly true, is not generally applicable when considering the complete system, which consists of the processor, memories and power conversion circuits. In this paper we present a power and energy model for a DVFS enabled mobile computing platform. The platform is based on a low power SoC, which integrates both the processor core and memory, as well as other hardware accelerators. We include in our analisys the study of the power conversion components, which supply the SoC. Starting from measures, we first characterize the power consumption of the SoC and the converters, then a power and energy model for the processor is proposed. The model is able to predict the power consumption of the processor core with an average error less than 10%. This is then used to analyse two DVFS scheduling techniques based on the EDF algorithm, Cycle Conserving and Look Ahead. The results show that the CPU energy saving computed using our model, is far less than what would be expected using a model that does not take into account the effect of the static power.
digital systems design | 2006
H. Ben Fradj; Cécile Belleudy; Michel Auguin
Several techniques were developed to reduce processor consumption which was the predominant source of dissipation. However with the technology evolution and the development of new applications that make heavy use of large memory data size, the energy savings obtained by these techniques become limited. In this article we showed that dynamic voltage frequency scaling technique (DVFS) increases the main memory consumption. A multi-banked memory architecture, having the capability of setting banks in low power modes when they are not accessed, is adopted to reduce the memory consumption. An approach of tasks allocation and banks configuration reducing the memory energy is developed at system level for multi-task and real-time systems. Experimental results show that, when we combined DVFS technique with an efficient multi-bank architecture and tasks to banks allocation, a system energy saving that reaches 35% is obtained
memory performance dealing with applications systems and architecture | 2005
Hanene Ben Fradj; Asmaa el Ouardighi; Cécile Belleudy; Michel Auguin
In the context of battery-driven embedded systems, reducing energy while maintaining performance is one of todays challenges. The on-chip memory count for a great part of the whole system consumption, especially for images and video processing applications that make heavy use of large memory data size.In this paper, we present new technique for efficiently exploiting on-chip memory space (cache, scrathpad) for a specific application to reduce the energy consumption without loss of performance. We configure and compare the impact of three different memory architectures on the energy consumption. The first one is composed of main memory with cache, in the second architecture we find a main memory and scratchpad memory and in the last architecture we combine both cache and scratchpad with the main memory. We show the effectiveness of the last architecture and a saving about 35% in energy consumption.
ieee international conference on green computing and communications | 2012
Trong Nhan Le; Olivier Sentieys; Olivier Berder; Alain Pegatoquet; Cécile Belleudy
System lifetime is the crucial problem of Wireless Sensor Networks (WSNs), and exploiting environmental energy provides a potential solution for this problem. When considering self-powered systems, the Power Manager (PM) plays an important role in energy harvesting WSNs. Instead of minimizing the consumption energy as in the case of battery powered systems, it makes the harvesting node converge to Energy Neutral Operation (ENO) to achieve a theoretically infinite lifetime and maximize the system performance. In this paper, a low complexity PM with a Proportional Integral Derivative (PID) controller is introduced. This PM monitors the buffered energy in the storage device and performs adaptation by changing the wake-up period of the wireless node. This shows the interest of our approach since the impractical monitoring harvested energy as well as consumed energy is not required as it is the case in other previously proposed techniques. Experimental results are performed on a real WSN platform with two solar cells in an indoor environment. The PID controller provides a practical strategy for long-term operations of the node in various environmental conditions.