Cetin Kaya

Effects of erase source bias on Flash EPROM device reliability

This paper is concerned with the effects of the source bias during the erase operation on the reliability of Flash EPROM devices. It will be shown that positive charge in the tunnel oxide, mostly generated by the erase operation, is a major cause of the unintentional charge losdgain mechanisms that disturb the data content of the memory cell. The effects of the erase source bias will be evaluated in the context of the positive oxide charge generation and the resulting enhancement of the gate current that causes the data loss. An optimal source bias during erase, around 2 V for our samples, will be shown to cause the least positive oxide charge. A model based on the band-to-band tunneling-induced hole generation in Si and subsequent hole injection during the erase operation will be presented and discussed.

A new technique for determining the capacitive coupling coefficients in flash EPROMs

A method for determining the capacitive coupling coefficients of flash erasable programmable read only memories (EPROMs) is introduced. This technique relies on the Fowler-Nordheim erase measurements and source/drain junction leakage characteristics of the device to extract the control gate, source, and drain coupling coefficients. An advantage offered by this method is its use of an actual flash EPROM cell without requiring additional test structures.<<ETX>>

Buried source-side injection (BSSI) for flash EPROM programming

A flash-EPROM cell structure that can be programmed at low drain voltages and low power is disclosed. The new element in the device structure is the incorporation of buried junction at the source side where the high electric field region is established during programming. The cell is programmed by hot-electron injection at the source side and erased by Fowler-Nordheim tunneling at the drain side. Typical programming time of 10 mu s/byte can be accomplished with 3.5 V on the drain junction. The structure can be built with the standard EPROM technology and can offer advantages in low-voltage power supply systems such as portable and notebook computers.<<ETX>>

Reverse-recovery safe operating area of diodes in power integrated circuits

Failure during reverse recovery of an IC power diode is examined. It is shown how one-dimensional diode behavior together with mixed-mode tcad can be used to predict safe operating conditions for the actual two-dimensional case.