Chamika M. Liyanagedera

Stochastic Spiking Neural Networks Enabled by Magnetic Tunnel Junctions: From Nontelegraphic to Telegraphic Switching Regimes

Stochastic Spiking Neural Networks based on nanoelectronic spin devices can be a possible pathway at achieving “brain-like” compact and energy-efficient cognitive intelligence. The computational model attempt to exploit the intrinsic device stochasticity of nanoelectronic synaptic or neural components to perform learning or inference. However, there has been limited analysis on the scaling effect of stochastic spin devices and its impact on the operation of such stochastic networks at the system level. This work attempts to explore the design space and analyze the performance of nanomagnet based stochastic neuromorphic computing architectures for magnets with different barrier heights. We illustrate how the underlying network architecture must be modified to account for the random telegraphic switching behavior displayed by magnets with low barrier heights as they are scaled into the superparamagnetic regime. We perform a device to system level analysis on a deep neural network architecture for a digit recognition problem on the MNIST dataset.

Magnetic Tunnel Junction as an On-Chip Temperature Sensor

Temperature sensors are becoming an increasingly important component in System-on-Chip (SoC) designs with increasing transistor scaling, power density and associated heating effects. This work explores a compact nanoelectronic temperature sensor based on a Magnetic Tunnel Junction (MTJ) structure. The MTJ switches probabilistically depending on the operating temperature in the presence of thermal noise. Performance evaluation of the proposed MTJ temperature sensor, based on experimentally measured device parameters, reveals that the sensor is able to achieve a conversion rate of 2.5K samples/s with energy consumption of 8.8 nJ per conversion (1–2 orders of magnitude lower than state-of-the-art CMOS sensors) for a linear sensing regime of 200–400 K.

Spin torque nano-oscillator based Oscillatory Neural Network

Oscillatory Neural Networks (ONN) are becoming a popular neuromorphic computing model owing to their efficient parallel processing capabilities. Hoppensteadt and Izhikevich proposed an ONN architecture resembling associative memory, with Phase-Locked Loop (PLL) circuits as neurons. Unfortunately, there are shortcomings in realizing such architectures due to the inefficiencies of CMOS based implementations of oscillators and other hardware. We propose a PLL structure for ONN applications fashioned using energy efficient and scalable Spin Torque Oscillators (STOs). We demonstrate the functionality of a 60 neuron ONN using STOs for binary image identification.

Coupled Spin-Torque Nano-Oscillator-Based Computation: A Simulation Study

In this article, we present a comprehensive study of four frequency locking mechanisms in Spin Torque Nano Oscillators (STNOs) and explore their suitability for a class of specialized computing applications. We implemented a physical STNO model based on Landau-Lifshitz-Gilbert-Slonczewski equation and benchmarked the model to experimental data. Based on our simulations, we provide an in-depth analysis of how the “self-organizing” ability of coupled STNO array can be effectively used for computations that are unsuitable or inefficient in the von-Neumann computing domain. As a case study, we demonstrate the computing ability of coupled STNOs with two applications: edge detection of an image and associative computing for image recognition. We provide an analysis of the scaling trends of STNOs and the effectiveness of different frequency locking mechanisms with scaling in the presence of thermal noise. We also provide an in-depth analysis of the effect of variations on the four locking mechanisms to find the most robust one in the presence of variations.

Multi-motor controller as an educational tool

Mastering concepts on power electronics and motor drives can be very challenging for many students. In order to deliver the concepts successfully hardware based learning tools are frequently used in undergraduate and graduate level courses. But most of these tools fall below expectations due to their complexity, lack of functionality or cost. This paper presents a learning tool on motor drives which addresses most of these issues. This proposed learning tool has the capability to deliver effective learning experiences on different types of motors discussed in advanced driving courses. The learning tool comes with user software which provides additional functionalities, such as the ability to manipulate closed loop variables, monitor real time speed variation, control firing patterns, log data and program the motor speed variation. The proposed learning tool is ideal to be incorporated in lab sessions to deliver important concepts in motor drives effectively and efficiently.

Analog Approach to Constraint Satisfaction Enabled by Spin Orbit Torque Magnetic Tunnel Junctions

Boolean satisfiability (k-SAT) is an NP-complete (k ≥ 3) problem that constitute one of the hardest classes of constraint satisfaction problems. In this work, we provide a proof of concept hardware based analog k-SAT solver, that is built using Magnetic Tunnel Junctions (MTJs). The inherent physics of MTJs, enhanced by device level modifications, is harnessed here to emulate the intricate dynamics of an analog satisfiability (SAT) solver. In the presence of thermal noise, the MTJ based system can successfully solve Boolean satisfiability problems. Most importantly, our results exhibit that, the proposed MTJ based hardware SAT solver is capable of finding a solution to a significant fraction (at least 85%) of hard 3-SAT problems, within a time that has a polynomial relationship with the number of variables(<50).

Image segmentation with stochastic magnetic tunnel junctions and spiking neurons

Image segmentation is a crucial pre-processing stage used in many object identification problems. The purpose of image segmentation is to simplify the representation of an image such that it can be more conveniently analyzed in the later stages of a problem. This is generally achieved through partitioning a complicated image into specific groups based on color, intensity or texture of the pixels of that image. Locally Excitatory Globally Inhibitory Oscillator Network or LEGION is one such segmentation algorithm, where synchronization and desynchronization between coupled oscillators are used to segment an image. To extract maximum benefits from the fast parallel processing nature of LEGION, one must resort to a hardware implementation of this architecture. Unfortunately, the present structure of LEGION with relaxation oscillators as nodes, is not ideal for scalable and energy efficient hardware realization of the network. In this work we propose two different networks for image segmentation, one with leaky integrate and fire neurons and the other with stochastic Magnetic Tunneling Junctions (MTJs), both inspired by the operating principles of LEGION. The structure of the proposed networks allows them to be translated into energy efficient and scalable hardware platforms. We demonstrate that the proposed networks can effectively and efficiently segment binary and gray-scale images with multiple objects.

Fast, low power evaluation of elementary functions using radial basis function networks

Fast and efficient implementation of elementary functions such as sin(), cos(), and log() are of ample importance in a large class of applications. The state of the art methods for function evaluation involves either expensive calculations such as multiplications, large number of iterations, or large Lookup-Tables (LUTs). Higher number of iterations leads to higher latency whereas large LUTs contribute to delay, higher area requirement and higher power consumption owing to data fetching and leakage. We propose a hardware architecture for evaluating mathematical functions, consisting a small LUT and a simple Radial Basis Function Network (RBFN), a type of an Artificial Neural Network (ANN). Our proposed method evaluates trigonometric, hyperbolic, exponential, logarithmic, and square root functions. This technique finds utility in applications where the highest priority is on performance and power consumption. In contrast to traditional ANNs, our approach does not involve multiplication when determining the post synaptic states of the network. Owing to the simplicity of the approach, we were able to attain more than 2.5x power benefits and more than 1.4x performance benefits when compared with traditional approaches, under the same accuracy conditions.

Pulse charger with zero current switching and isolation for electric vehicles and renewable energy applications

Fast charging has become a major concern due to advents of more convenient methodologies of extracting renewable energy with the aid of new technology. Batteries are used widely to store energy and a charging technique that hinders the chemical reactions impeding the current is found. This technique known as pulse charging is thus comparatively fast and has received extensive attention over the last decade. Simultaneously, many fast charging topologies have been developed over the years with their own strengths and weaknesses. In this research a novel pulse charging topology with soft switching and isolation is introduced which facilitates high power pulse charging due to reduced switching losses.