Chang-Ho Ra

Si-Compatible Cleaning Process for Graphene Using Low-Density Inductively Coupled Plasma

We report a novel cleaning technique for few-layer graphene (FLG) by using inductively coupled plasma (ICP) of Ar with an extremely low plasma density of 3.5 × 10(8) cm(-3). It is known that conventional capacitively coupled plasma (CCP) treatments destroy the planar symmetry of FLG, giving rise to the generation of defects. However, ICP treatment with extremely low plasma density is able to remove polymer resist residues from FLG within 3 min at a room temperature of 300 K while retaining the carbon sp(2)-bonding of FLG. It is found that the carrier mobility and charge neutrality point of FLG are restored to their pristine defect-free state after the ICP treatment. Considering the application of graphene to silicon-based electronic devices, such a cleaning method can replace thermal vacuum annealing, electrical current annealing, and wet-chemical treatment due to its advantages of being a low-temperature, large-area, high-throughput, and Si-compatible process.

Metal-Semiconductor Barrier Modulation for High Photoresponse in Transition Metal Dichalcogenide Field Effect Transistors

A gate-controlled metal-semiconductor barrier modulation and its effect on carrier transport were investigated in two-dimensional (2D) transition metal dichalcogenide (TMDC) field effect transistors (FETs). A strong photoresponse was observed in both unipolar MoS2 and ambipolar WSe2 FETs (i) at the high drain voltage due to a high electric field along the channel for separating photo-excited charge carriers and (ii) at the certain gate voltage due to the optimized barriers for the collection of photo-excited charge carriers at metal contacts. The effective barrier height between Ti/Au and TMDCs was estimated by a low temperature measurement. An ohmic contact behavior and drain-induced barrier lowering (DIBL) were clearly observed in MoS2 FET. In contrast, a Schottky-to-ohmic contact transition was observed in WSe2 FET as the gate voltage increases, due to the change of majority carrier transport from holes to electrons. The gate-dependent barrier modulation effectively controls the carrier transport, demonstrating its great potential in 2D TMDCs for electronic and optoelectronic applications.

Gate-controlled Schottky barrier modulation for superior photoresponse of MoS 2 field effect transistor

An ultrahigh photocurrent (PC) signal which was about thousand times higher compared to the corresponding dark current was achieved in a two-dimensional (2D) multi-layer MoS2 field effect transistor (FET), owing to a gate-controlled MoS2/Ti/Au Schottky barrier (SB) modulation. The SBs can be enlarged for suppressing the electron drift along the channel in dark environment, and be reduced for the collection of photo-excited charge carriers in illuminating environment, providing the great potential for 2D electronic and optoelectronic applications.

Effects of Plasma Treatment on Contact Resistance and Sheet Resistance of Graphene FET

We investigated the effect of capacitively coupled Ar plasma treatment on contact resistance (R c ) and channel sheet resistance (R sh ) of graphene field effect transistors (FETs), by varying their channel length in the wide range from 200 nm to 50 μm which formed the transfer length method (TLM) patterns. When the Ar plasma treatment was performed on the long channel (10 ~ 50 μm) graphene FETs for 20 s, R c decreased from 2.4 to 1.15 kΩ·μm. It is understood that this improvement in R c is attributed to the formation of sp³ bonds and dangling bonds by the plasma. However, when the channel length of the FETs decreased down to 200nm, the drain current (I d ) decreased upon the plasma treatment because of the significant increase of channel R sh which was attributed to the atomic structural disorder induced by the plasma across the transfer length at the edge of the channel region. This study suggests a practical guideline to reduce R c using various plasma treatments for the R c sensitive graphene and other 2D material devices, where R c is traded off with Rsh.

Electrically switchable graphene photo-sensor using phase-change gate filter for non-volatile data storage application with high-speed data writing and access

An electrically switchable graphene photo-sensor (SGPS) is proposed for multiple functional applications. SGPS is a dual-gate thin-film transistor with a graphene channel and a phase-change chalcogenide (GeSbTe) gate filter. This gate filter is switchable between the amorphous (optically transparent) and crystalline (optically non-transparent) phases by applying the gate biases. When the gate filter is switched to the amorphous/crystalline (a/c) phases, the SGPS will/not yield photo-current (Ipc) under a constant light source. By detecting the presence of Ipc, two data states can be read out so as to accomplish non-volatile data storage. SGPS can present a switching speed of ∼50 ns between the a/c phases of GeSbTe and a data access speed as fast as 10 ns. SGPS shows very good 10-year data retention at 85°C and good endurance of >106 switching cycles between the a/c phases of the GeSbTe gate filter.

Simulation on Reflectance from Solar Cell Surface Using Double Layered Anti-Reflective Coating

In this paper, we conducted MATLAB simulation using the reflectance formula and the Plancks black body radiation principle, for the purpose of identifying the opimum material and thickness of anti-reflective coating from double layered structures. We found that the optimum condition was obtained when refractive index of upper layer is 1.44 and that of lower layer is 2.29. As materials close to these refractive indices, as the upper layer and , ZnS, as the lower layer were suggested. The best result in an average reflectance of 2.759% was obtained from a double layered structure of 94 nm/ZnS 55 nm.