Chang Mok Park

Development of Virtual Simulator for Visual Validation of PLC Program

Agile and flexible manufacturing systems make it mandatory that control programs have features such as agility, flexibility and reusability to meet fast- changing customer demands. Visual validation of control logics is one of the most sought-after ways to make the control logic more feasible for rapid product prototyping, concurrent engineering and flexible and agile manufacturing. This paper presents the development of virtual simulator to validate control programs (PLC) visually. For simplification, virtual cell is separated into generic model that resembles the operations and events of real cell and graphic model - a visualization module - which gives easy understanding of dynamic behavior of cell. The generic model is formalized using timed Finite State Automata. ROBOWORKS and IGRIP are used for graphic model. We developed tools for easy integration of proposed simulators with 3D graphic simulators and soft PLCs. We applied our system to real PLC applications and found that PLC programs can be easily validated by this system.

Speech authentication system using digital watermarking and pattern recovery

The objective of this paper is to detect speech forgery using digital audio watermarking and pattern recovery techniques. A digital watermark pattern has been attached with the speech signal to detect three kinds of alterations or forgeries such as substitution, insertion, and removal. The watermark pattern will be modified if some changes have been made to the speech contents. Modification and forgery can be measured and detected by pattern recovery. The proposed method uses the cyclic pattern embedding to overcome synchronizing problems of previous detection techniques. In addition, pattern recovery enhances the robustness to compression. This method has been tested and verified using six recording devices, which was used for collecting verbal data. The speech signals were sampled at the rate of 8kHz and digitized at 16bits resolution. Randomly chosen regions were substituted, removed, and compressed in MP3 at the rate of 16kbps as well as in CELP at the rate of 11.5kbps. The experiment shows the perfect detection for three kinds of forgeries and it proved the validity of the proposed method.

III-Phase Verification and Validation of IEC Standard Programmable Logic Controller

The objective of this paper is to define an integrated approach for offline verification and validation of the control logics to provide absolute solution by implementing the Ill-phase V&V method in a manufacturing industry. The control logic plays vital role in an agile manufacturing system for proper functioning of the FMS. The effort to integrate the formal verification techniques with virtual commissioning is emerging, which is still not in a full fledged industrial usage, due to the isolated thinking of the user about formal verification techniques. Existing techniques like simulation has not been able to detect the hidden errors, which may propagate from one workcell to another workcell in a long run and create a complete breakdown in the manufacturing unit. These errors required to be carefully tested before the real time implementation. Control logics play a vital role to reduce the down-time and ramp-up time in a manufacturing industry. We need an integrated approach and techniques to support the consistent running of the production cycle. This paper explained about the positive aspects of manual and software based automated and virtual commissioning techniques to provide an applicable solution to the fast paced manufacturing industries.

Control logic verification for an automotive body assembly line using simulation

In this paper, an approach is proposed that verifies the controller logic processes for the automobile industry via simulation. For this purpose, a state-based object model that creates a virtual car body assembly line is proposed and a verification methodology using observed signal sequences during the simulation is proposed. This approach was applied to an assembly line controlled by a PLC and the effectiveness of the proposed system was explained in a case study.

Hash-based RFID security protocol using randomly key-changed identification procedure

Radio Frequency Identification (RFID) is considered to be a promising identification approach in ubiquitous sensing technology. The operation of RFID systems in advanced applications may pose security and privacy risks to both organizations and individuals. In this paper, using randomly Key-Changed Identification, we propose an eavesdropping-proof security protocol based on cryptographic one way hash functions for passive RFID tags. Compared with several existing methods, our proposed protocol shows some security improvements as well as gives a reasonable and compatible approach that could be easily employed in practical situations. Finally, an illustration is also given to show clearly the whole operating procedure of the proposed procedure. Key Words: RFID (Radio Frequency Identification), Security Protocol, Hash Functions, Randomly Key-Changed Identification.

PLCStudio: simulation based PLC code verification

Proposed in this paper is the architecture of a PLC programming environment that enables a visual verification of PLC programs. The proposed architecture integrates a PLC program with a corresponding plant model, so that users can intuitively verify the PLC program in a 3D graphic environment. The plant model includes all manufacturing devices of a production system as well as corresponding device programs to perform their tasks in the production system, and a PLC program contains the control logic for the plant model. For the implementation of the proposed PLC programming environment, it is essential to develop an efficient methodology to construct a virtual device model as well as a virtual plant model. The proposed PLC programming environment provides an efficient construction method for a plant model based on the DEVS (discrete event systems specifications) formalism, which supports the specification of discrete event models in a hierarchical, modular manner.

A Formal Model for Real-Time Automated Manufacturing System Control with Timed-MPSG

The objective of this paper is to extend the MPSC model by introducing the temporal properties to check time constraint, and do the performance analysis of the real-time shop floor controller. The MPSG (message-based part state graph) model has been developed for the execution portion of shop-floor controllers that operate in a distributed and hierarchical control environment. It is based on deterministic finite state automata and represents the execution module of shop-floor controller as a communicating finite state machine. However, there is still no consideration for handling the time in this framework. For this purpose, a formal model of Timed-MPSG processes is proposed in terms of a real-time part processing task. Furthermore, the conceptual idea, control flow algorithm and the implementation methodology of the Timed-MPSG are described with a simple example.

Job Allocation And Scheduling In Multi Robotic Tasks Considering Collision Free Operation

Abstract This paper presents a method of job allocation and scheduling that determines optimal job allocation and the shortest paths for robots having collision regions. The problem described in this paper is an application of a classical flexible job-shop scheduling problem with shared resources. A genetic algorithm and a TABU search are used for the job allocation and scheduling procedures. Overlapping activities in a collision region can result in robot collisions. This should be a hard constraint in which a non-overlapping condition is guazanteed. To achieve this, the sequencing in a collision region should be determined. Job assignrnents, ordering in non-collision regions of each robot, and priorities in regions shazed between various robots are encoded using a genetic representation in which the objective is to minimize the job completion time. As the seazch space is extremely large, a genetic algorithm is used for global searches and TABU is used for local searches. The most viable solution is obta...

Architecture for modeling, simulation, and execution of PLC based manufacturing system

In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (programmable logic controller) based manufacturing system. The main objective is to integrate the high level modeling, simulation, and device level executable code generation. This architecture can improve the fidelity between high level system model and lower level PLC controlled devices. In this paper, we model the shop floor controller system using DEVS (discrete event system specification) formalism, subsequently, simulate the model and generate SOP (sequence of operations). We added two algorithms in conventional DEVS, the first algorithm makes an interface between 3D graphic model and DEVS model, whereas, the second algorithm generates SOP. As a result, the generated SOP can be mapped with PLC I/O (input/output) address to generate an executable controller code. For the purpose of further validation and implementation, the generated program can be downloaded to software or hardware PLC.

PLC Control Logic Error Monitoring and Prediction Using Neural Network

This paper reviews monitoring and error prediction of PLC-program using Neural Network. In the PLC-device controlled manufacturing line, PLC-program holds place of underlying component. It becomes controlling mechanism. The level of automation in the production line relies on control mechanism practiced. In the modern manufacturing, PLC devices can handle whole production line given that structured and smart PLC-program is executed. In other words, PLC-program can manage whole process structure consisting set of procedures. We present a method to monitor PLC-program and PLC error prediction it using neural network. The neural network method being predictive in nature, it rigorously can monitor process signals from sensors, sensed during operation of PLC devices or execution of PLC-program. Subsequently, a neural network algorithm practiced for the analysis of signals. In this way, thorough monitoring of PLC-program can find possible errors from temporal parameters (e.g. Voltage, bias etc). In addition, possible alterations in program and irregularities can be minimized. That can result, easily to use in fault detection, maintenance, and decision support in manufacturing organization. Similarly, it can lessen down-time of machines and prevent possible risks.