Changhyuck Sung

Effects of Liner Thickness on the Reliability of AgTe/TiO 2 -Based Threshold Switching Devices

The effects of liner thickness on the reliability of AgTe/TiO2-based threshold switching (TS) devices were investigated. The off-state current of an AgTe/TiO2/Pt TS device was found to be significantly increased by in-diffusion of Ag into the TiO2 layer during the annealing process. Therefore, 3-, 5- and 7-nm TiN liners were introduced and compared to prevent the in-diffusion of Ag. While the 3-nm TiN liner was shown to be incapable of blocking Ag in-diffusion into the TiO2 layer, the 5- and 7-nm liners effectively suppressed in-diffusion and maintained high off-state resistance. However, the TS device with the 7-nm TiN liner exhibited wide threshold voltage distribution and poor endurance characteristics owing to a lack of Ag sources. The TS device with a 5-nm TiN liner, by contrast, was found to have an adequate amount of Ag sources and to demonstrate thermally stable and electrically reliable characteristics. The effects of TiN liner on Ag diffusion were also directly confirmed using energy dispersive spectrometry line profiles, transmission electron microscopy imaging, and mapping analyses.

Improved endurance of RRAM by optimizing reset bias scheme in 1T1R configuration to suppress reset breakdown

In this study, we reported suppressed reset breakdown, which causes endurance failure, by optimizing reset bias scheme in HfO2-based 1T1R RRAM device. Since the resistance of RRAM in reset operation controls effective transistor gate bias (VGSeff=VGS-ID*RRRAM) which limits saturation drain current, optimum gate bias can supply sufficient reset current in low resistance state and limit current in high resistance state. As a result, the reset breakdown was successfully suppressed by applying optimum gate voltage and the endurance was significantly improved with maintaining high resistance ratio.

Retention modeling for ultra-thin density of Cu-based conductive bridge random access memory (CBRAM)

We investigate the effect of Cu concentration On-state resistance retention characteristics of W/Cu/Ti/HfO2/Pt memory cell. The development of RRAM device for application depends on the understanding of the failure mechanism and the key parameters for device optimization. In this study, we develop analytical expression for cations (Cu+) diffusion model using Gaussian distribution for detailed analysis of data retention time at high temperature. It is found that the improvement of data retention time depends not only on the conductive filament (CF) size but also on Cu atoms concentration density in the CF. Based on the simulation result, better data retention time is observed for electron wave function associated with Cu+ overlap and an extended state formation. This can be verified by analytical calculation of Cu atom defects inside the filament, based on Cu+ diffusion model. The importance of Cu diffusion for the device reliability and the corresponding local temperature of the filament were analyzed by ...

Effect of Conductance Linearity and Multi-level Cell Characteristics of TaO x -based Synapse Device on Pattern Recognition Accuracy of Neuromorphic System

To improve the classification accuracy of an image data set (CIFAR-10) by using analog input voltage, synapse devices with excellent conductance linearity (CL) and multi-level cell (MLC) characteristics are required. We analyze the CL and MLC characteristics of TaOx-based filamentary resistive random access memory (RRAM) to implement the synapse device in neural network hardware. Our findings show that the number of oxygen vacancies in the filament constriction region of the RRAM directly controls the CL and MLC characteristics. By adopting a Ta electrode (instead of Ti) and the hot-forming step, we could form a dense conductive filament. As a result, a wide range of conductance levels with CL is achieved and significantly improved image classification accuracy is confirmed.

Controllable quantized conductance for multilevel data storage applications using conductive bridge random access memory

In this paper, we investigate the quantized conduction behavior of conductive bridge random access memory (CBRAM) with varied materials and ramping rates. We report stable and reproducible quantized conductance states with integer multiples of fundamental conductance obtained by optimizing the voltage ramping rate and the Ti-diffusion barrier (DB) at the Cu/HfO2 interface. Owing to controlled diffusion of Cu ions by the Ti-DB and the optimized ramping rate, through which it was possible to control the time delay of Cu ion reduction, more than seven levels of discrete conductance states were clearly observed. Analytical modeling was performed to determine the rate-limiting step in filament growth based on an electrochemical redox reaction. Our understanding of the fundamental mechanisms of quantized conductance behaviors provide a promising future for the multi-bit CBRAM device.

Perspective: A review on memristive hardware for neuromorphic computation

Neuromorphic computation is one of the axes of parallel distributed processing, and memristor-based synaptic weight is considered as a key component of this type of computation. However, the material properties of memristors, including material related physics, are not yet matured. In parallel with memristors, CMOS based Graphics Processing Unit, Field Programmable Gate Array, and Application Specific Integrated Circuit are also being developed as dedicated artificial intelligence (AI) chips for fast computation. Therefore, it is necessary to analyze the competitiveness of the memristor-based neuromorphic device in order to position the memristor in the appropriate position of the future AI ecosystem. In this article, the status of memristor-based neuromorphic computation was analyzed on the basis of papers and patents to identify the competitiveness of the memristor properties by reviewing industrial trends and academic pursuits. In addition, material issues and challenges are discussed for implementing the memristor-based neural processor.