Charles E. Stroud
Lattice Semiconductor
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Featured researches published by Charles E. Stroud.
Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001 | 2001
Miron Abramovici; John M. Emmert; Charles E. Stroud
We present an integrated approach to on-line FPGA testing, diagnosis and fault tolerance, to be used in high-reliability and high-availability hardware. The testing and diagnostic process takes place in Self-Testing AReas (STARs) of the FPGA, without disturbing the normal system operation. The entire chip is tested by roving the STARs across the FPGA. Our approach guarantees complete testing of both logic cells and interconnect with maximum diagnostic resolution. Our multi-level fault-tolerant technique allows using partially defective logic and routing resources for normal operation, providing longer mission life in the presence of faults. In addition, our dynamic fault-tolerant method ensures that spare resources are always present in the neighborhood of the located fault, thus simplifying fault-bypassing. Our complete method has been successfully implemented and demonstrated on the ORCA 2CA series FPGAs from Lucent Technologies.
Archive | 1998
Miron Abramovici; Charles E. Stroud; Sajithas S Wijesuriya
Archive | 2000
Miron Abramovici; Charles E. Stroud
Archive | 2000
Miron Abramovici; Charles E. Stroud; John M. Emmert
Archive | 1999
Miron Abramovici; Charles E. Stroud
Archive | 2001
Miron Abramovici; John M. Emmert; Charles E. Stroud; エム.エマート ジョン; イー.ストラウド チャールズ; アブラーマヴィシ マイラン
Archive | 1997
Charles E. Stroud; Eric Lee; Miron Abramovici
Archive | 2002
Miron Abramovici; John M. Emmert; Charles E. Stroud
Archive | 2001
Miron Abramovici; John M. Emmert; Charles E. Stroud
Archive | 2000
Miron Abramovici; Charles E. Stroud