Charles Gerard Woychik

Multi-row linear cMUT array using cMUTs and multiplexing electronics

A large area reconfigurable imaging array for research purposes is being developed with co-integrated cMUTs and control electronics. The goal is a 2.5cm 2D tileable module with ≫16,000 transducer sub-elements spaced at a pitch of 185um in X and Y dimensions. As a prototype demonstration of some of the goals of this effort, a multi-row linear array using cMUTs and external multiplexing electronics was designed and fabricated. In this paper the challenges of trenched cMUT attach to a laminate interposer as part of a tileable module will be discussed. The architecture of the tileable module build-up for manufacturability, reliability, acoustic planarity, and reduced spacing between tiles and cMUT chips will also be addressed. Finally, a first prototype will be shown and experimental acoustic results with the new cMUT-based probe will be presented.

Embedded Chip Build-Up Using Fine Line Interconnect

Advanced packaging technologies are driven by two generally balanced forces: performance advances being made by the semiconductor industry and the product requirements of the leading electronics markets. The semiconductor advancements include shrinking feature sizes and innovative transistor structures that provide ever more functionality per unit area of silicon and faster clock rates. One of the leading electronics markets is the portable electronics market, covering cell phones, digital assistants, portable entertainment and digital cameras. These products are driving smaller and thinner packages, finer featured substrates, multichip packages, such as SiPs (System-in-Packages) and 3-D stacking. They are also driving to mixed analog, digital, and RF circuitry within one package with increasing concerns with interconnect parasitics, EMI shielding and thermal performance. A new family of embedded chip packaging and interconnection approaches are being developed to address the next generation portable electronics circuits. These embedded chip approaches feature embedded actives and passives, micro-vias, thin film polymer dielectrics and fine line build-up interconnections. This paper will look at a number of embedded chip approaches including the GE Embedded Chip Build-Up technology and analyze the electrical, density, reliability and cost advantages of this approach and show examples of its use in chip scale, chip carrier, and SiP applications for portable electronics applications.

5F-2 Packaging and Design of Reconfigurable Arrays for Volumetric Imaging

Recent advances in capacitive micromachined ultrasound transducers (cMUTs), piezoceramic acoustic stack design, and transducer-to-electronics integration are enabling the fabrication of highly integrated reconfigurable ultrasound arrays. Reconfigurability in this context refers to the ability to reorganize the array elements in any configuration deemed desirable. Attractive configurations are an annular array, which can be translated electronically along a 2D array surface, or a phased array whose element orientation and pitch can be varied to optimize an image [1-6]. Further, annular array configurations make possible 3D-stacked miniaturized systems by reducing channel count, system size, and power consumption. In addition to such benefits, the annular array also provides dynamic axisymmetric focusing for excellent image quality. Several methods of integration have been explored to realize stacked transducer arrays with low channel count. Key components of the design include advanced interconnect such as through silicon vias in cMUTs and z-axis backing stacks, switch matrix application specific integrated circuits (ASICs), and high density multi-layer flex.

Packaging of large and low-pitch size 2D ultrasonic transducer arrays

The successful packaging and electronics integration of large 2D array devices with small pitch-sizes, such as fully populated 2D ultrasonic transducer arrays, require a flexible, simple, and reliable integration approach. One example for such electronics integration is based on through silicon vias (TSVs) with under-bump metallization (UBM) stack for solder bumping. In this paper, we demonstrate such an approach by successfully integrating a fully populated 2D ultrasonic transducer array. Our integration is based on a previously reported TSV technology (trench-frame technology), based on trench-isolated interconnects with supporting frame. We successfully combined the trench-frame technology with a simple UBM preparation technique - electro plating or chemical plating techniques with passivation layers for UBM pad definition are not required. Our results show high shear strength (26.5 g) of the UBM, which is essential for successful flip-chip bonding. The yield of the interconnections is 100% with excellent solder-ball-height uniformity (¿ = 0.9 ¿m). As demonstrated in this paper, this allows for a large-scale assembly of a tiled array by using an interposer. A design guideline for finer element-pitch design was developed suggesting that fusion bonding strength and the length of pillars are the main design parameters.

Large Area MEMS Based Ultrasound Device for Cancer Detection.

We present image results obtained using a prototype ultrasound array which demonstrates the fundamental architecture for a large area MEMS based ultrasound device for detection of breast cancer. The prototype array consists of a tiling of capacitive Micro-Machined Ultrasound Transducers (cMUTs) which have been flip-chip attached to a rigid organic substrate. The pitch on the cMUT elements is 185 um and the operating frequency is nominally 9 MHz. The spatial resolution of the new probe is comparable to production PZT probes, however the sensitivity is reduced by conditions that should be correctable. Simulated opposed-view image registration and Speed of Sound volume reconstruction results for ultrasound in the mammographic geometry are also presented.

Reconfigurable mosaic annular arrays

Mosaic annular arrays (MAA) based on reconfigurable array (RA) transducer electronics assemblies are presented as a potential solution for future highly integrated ultrasonic transducer subsystems. Advantages of MAAs include excellent beam quality and depth of field resulting from superior elevational focus compared with 1-D electronically scanned arrays, as well as potentially reduced cost, size, and power consumption resulting from the use of a limited number of beamforming channels for processing a large number of subelements. Specific design tradeoffs for these highly integrated arrays are discussed in terms of array specifications for center frequency, element pitch, and electronic switch-on resistance. Large-area RAs essentially function as RC delay lines. Efficient architectures which take into account RC delay effects are presented. Architectures for integration of the transducer and electronics layers of large-area array implementations are reviewed.

Packaging and modular assembly of large-area and fine-pitch 2-D ultrasonic transducer arrays

A promising transducer architecture for largearea arrays employs 2-D capacitive micromachined ultrasound transducer (CMUT) devices with backside trench-frame pillar interconnects. Reconfigurable array (RA) application-specified integrated circuits (ASICs) can provide efficient interfacing between these high-element-count transducer arrays and standard ultrasound systems. Standard electronic assembly techniques such as flip-chip and ball grid array (BGA) attachment, along with organic laminate substrate carriers, can be leveraged to create large-area arrays composed of tiled modules of CMUT chips and interface ASICs. A large-scale, fully populated and integrated 2-D CMUT array with 32 by 192 elements was developed and demonstrates the feasibility of these techniques to yield future large-area arrays. This study demonstrates a flexible and reliable integration approach by successfully combining a simple under-bump metallization (UBM) process and a stacked CMUT/interposer/ASIC module architecture. The results show high shear strength of the UBM (26.5 g for 70-μm balls), high interconnect yield, and excellent CMUT resonance uniformity (s = 0.02 MHz). A multi-row linear array was constructed using the new CMUT/interposer/ASIC process using acoustically active trench-frame CMUT devices and mechanical/ nonfunctional Si backside ASICs. Imaging results with the completed probe assembly demonstrate a functioning device based on the modular assembly architecture.