Cheng-Chen Liu

A Dual-Band CMOS Voltage-Controlled Oscillator Implemented With Dual-Resonance LC Tank

A new fully integrated, dual-band CMOS voltage controlled oscillator (VCO) is presented. The VCO is composed of n-core cross-coupled Colpitts VCOs and was implemented in 0.18 mum CMOS technology with 0.8 V supply voltage. The circuit allows the VCO to operate at two resonant frequencies with a common LC tank. The VCO has two control inputs, one for continuous control of the output frequency and one for band switching. This VCO is configured with 5 GHz and 12 GHz frequency bands with differential outputs. The dual-band VCO operates in 4.78-5.19 GHz and 12.19-12.61 GHz. The phase noises of the VCO operating at 5.11 and 12.2 GHz are -117.16 dBc/Hz and -112.15 dBc/Hz at 1 MHz offset, respectively, while the VCO draws 3.2/2.72 mA and 2.56/2.18 mW consumption at low/high frequency band from a 0.8 V supply.

CMOS Colpitts Quadrature VCO Using the Body Injection-Locked Coupling Technique

This paper presents a new low phase noise quadrature voltage-controlled oscillator (QVCO), which consists of two differential complementary Colpitts voltage-controlled oscillators (VCOs) with a tail inductor. The output of the tail inductor in one differential VCO is injected to the bodies of the nMOSFETs in the other differential VCO and vice versa. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.725 times 0.839 mm2. At the supply voltage of 1.1 V, the total power consumption is 9.9 mW. The free-running frequency of the QVCO is tunable from 5.26 GHz to 5.477 GHz as the tuning voltage is varied from 0.0 V to 1.1 V. The measured phase noise at 1 MHz frequency offset is -124.36 dBc/Hz at the oscillation frequency of 5.44 GHz and the figure of merit (FOM) of the proposed QVCO is -189.1 dBc/Hz.

A Wide-Locking Range

A new low power wide locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.13 m CMOS process is presented. The push-push ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator with linear mixer to extend the locking range. The power consumption of the ILFD core is 2.05 mW. The dividers free-running frequency is tunable from 4.37 to 5.43 GHz by tuning the varactors control bias, and at the incident power of 0 dBm the maximum locking range is 2.6 GHz (16.5%), from the incident frequency 14.5 to 17.1 GHz. The operation range is 5.1 GHz (35.1%), from 12.0 to 17.1 GHz.

{\div} 3

A 5.6 GHz balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.18 mum CMOS 1P6M process. It consists of two single-ended complementary Colpitts LC-tank VCOs coupled by two pairs of varactors. At the supply voltage of 1.2 V, the output phase noise of the VCO is -119.13 dBc/Hz at 1MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.29 dBc/Hz. Total VCO core power consumption is 2.4 mW. Tuning range is about 600 MHz, from 5.36 to 5.96 GHz, while the control voltage was tuned from 0 to 1.2 V.

Injection-Locked Frequency Divider Using Linear Mixer

A new differential voltage-controlled oscillator (VCO) is designed and implemented in a 0.13 mum CMOS 1P8M process. The designed circuit topology is an all nMOS LC-tank Clapp-VCO using a series-tuned resonator. At the supply voltage of 0.9 V, the output phase noise of the VCO is -110.5 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 18.78 GHz, and the figure of merit is -188.67 dBc/Hz. The core power consumption is 5.4 mW. Tuning range is about 3.43 GHz, from 18.79 to 22.22 GHz, while the control voltage was tuned from 0 to 1.3 V.

A 5.6 GHz Low Power Balanced VCO in 0.18

This letter presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two complementary cross-coupled voltage-controlled oscillators (VCOs) with two tail inductors. The two differential VCOs are coupled via two tail inductors to form a quadrature VCO. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm CMOS technology and the die area is 0.83 × 0.96 mm2. At the supply voltage of 1.45 V, the free-running frequency of the QVCO is tunable from 4.94 to 5.22 GHz as the tuning voltage is varied from 0.0 to 1.0 V. The total power consumption is 8.7 mW and the measured phase noise at 1 MHz frequency offset is -124.58 dBc/Hz at the oscillation frequency of 5.15 GHz and the figure of merit (FOM) of the proposed QVCO is -189.42 dBc/Hz.

\mu

This letter presents a wide-locking range, body-injected, injection locked frequency divider (ILFD) with tunable active inductors (TAIs) and variable division ratio. The ILFD was fabricated in the 0.18 mum 1P6M CMOS technology, and it has the modulus of 2, 3, 4, and 5, and can be used as a first-harmonic injection-locked oscillator (ILO). The divide-by-3 function is performed by injecting differential a signal to the bodies of cross-coupled transistors in the VCO. At the supply voltage of 1.5 V, the free-running divider is tunable from 0.53 to 1.72 GHz. At the incident power of 0 dBm the operation range in the first-harmonic ILO is from the incident frequency 0.53 to 3.2 GHz. The operation range in the divide-by-3 (divide-by-2) mode is about 3.59 (4.13) GHz, from the incident frequency 1.55 to 5.14 (0.87 to 5.0) GHz.

m CMOS

This paper presents a quadrature injection locked frequency divider (ILFD) employing tunable active inductors (TAIs), which are used is to extend the locking range and to reduce die area. The CMOS ILFD is based on a new quadrature voltage-controlled oscillator (VCO) with cross-coupled switching pairs and TAI-C tanks, and was fabricated in the 0.18-μm 1P6M CMOS technology. The divide-by-2 LC-tank ILFD is performed by adding injection MOSFETs between the differential outputs of the VCO. Measurement results show that at the supply voltage of 1.8V, the divider free-running frequency is tunable from 1.34GHz to 3.07GHz, and at the incident power of 0dBm the locking range is about 6GHz (137%), from the incident frequency 1.37GHz to 7.38GHz. The core power consumption is 22.8mW. The die area is 0.63×0.55mm2.

A Differential Clapp-VCO in 0.13

This letter presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two complementary cross-coupled voltage-controlled oscillators (VCOs) coupled via varactors. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm CMOS technology and the die area is 0.61 × 0.95 mm2. At the supply voltage of 1.2 V, the total power consumption is 3.7 mW. The free-running frequency of the QVCO is tunable from 3.86 GHz to 4.22 GHz as the tuning voltage is varied from 0.0 to 1.2 V. The measured phase noise at 1 MHz frequency offset is -123.42 dBc/Hz at the oscillation frequency of 3.94 GHz and the figure of merit (FOM) of the proposed QVCO is -190.38 dBc/Hz.

\mu{\rm m}

This letter presents an ultra-low voltage quadrature voltage-controlled oscillator (QVCO). The LC-tank QVCO consists of two low-voltage voltage-controlled oscillators (VCOs) with the body dc biased at the drain bias through a resistor. The superharmonic and back-gate coupling techniques are used to couple two differential VCOs to run in quadrature. The proposed CMOS QVCO has been implemented with the UMC 90 nm CMOS technology and the die area is 0.827 × 0.913 mm2. At the supply voltage of 0.22 V, the total power consumption is 0.33 mW. The free-running frequency of the QVCO is tunable from 3.42 to 3.60 GHz as the tuning voltage is varied from 0.0 to 0.3 V. The measured phase noise at 1 MHz offset is -112.97 dBc/Hz at the oscillation frequency of 3.55 GHz and the figure of merit (FOM) of the proposed QVCO is about -188.79 dBc/Hz.