Miin-Horng Juang
National Taiwan University of Science and Technology
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Featured researches published by Miin-Horng Juang.
IEEE Microwave and Wireless Components Letters | 2006
Yun-Hsueh Chuang; S.-H. Lee; R.-H. Yen; Sheng-Lyang Jang; Jian-Feng Lee; Miin-Horng Juang
A low voltage and wide locking range injection-locked frequency divider using a standard 0.18-/spl mu/m complementary metal oxide semiconductor (CMOS) process is presented. The wide locking range and the low-voltage operation are performed by adding an injection nMOS between the differential outputs of the divider that contains on-chip transformers which result in positive feedback loops to swing the output signals above the supply and below the ground potential. This dual-swing capability maximizes the carrier power and achieves low-voltage performance. The measurement results show that at the supply voltage of 0.75-V, the divider free-running frequency is 2.02 GHz, and at the incident power of 0 dBm the locking range is about 1.49 GHz (36.88%), from the incident frequency 3.27 to 4.64GHz.
IEEE Microwave and Wireless Components Letters | 2009
Sheng-Lyang Jang; Shin‐Hsin Huang; Cheng-Chen Liu; Miin-Horng Juang
This paper presents a new low phase noise quadrature voltage-controlled oscillator (QVCO), which consists of two differential complementary Colpitts voltage-controlled oscillators (VCOs) with a tail inductor. The output of the tail inductor in one differential VCO is injected to the bodies of the nMOSFETs in the other differential VCO and vice versa. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.725 times 0.839 mm2. At the supply voltage of 1.1 V, the total power consumption is 9.9 mW. The free-running frequency of the QVCO is tunable from 5.26 GHz to 5.477 GHz as the tuning voltage is varied from 0.0 V to 1.1 V. The measured phase noise at 1 MHz frequency offset is -124.36 dBc/Hz at the oscillation frequency of 5.44 GHz and the figure of merit (FOM) of the proposed QVCO is -189.1 dBc/Hz.
IEEE Microwave and Wireless Components Letters | 2006
Yun-Hsueh Chuang; S.-H. Lee; R.-H. Yen; Sheng-Lyang Jang; Miin-Horng Juang
A novel low-voltage quadrature voltage-controlled oscillator (QVCO) with voltage feedback to the input gate of a switching amplifier is proposed and implemented using the standard TSMC 0.18-mum CMOS 1P6M process. The proposed circuit topology is made up of two low-voltage LC-tank VCOs, where the coupled QVCO is obtained using the transformer coupling technique. At the 0.7-V supply voltage, the output phase noise of the VCO is -124.9 dBc/Hz at 1-MHz offset frequency from the carrier frequency of 2.4GHz, and the figure of merit is -185.35dBc/Hz. Total power consumption is 5.18 mW. Tuning range is about 135 MHz while the control voltage was tuned from 0 to 0.7V
IEEE Microwave and Wireless Components Letters | 2006
Yun-Hsueh Chuang; S.-H. Lee; Sheng-Lyang Jang; J.-J. Chao; Miin-Horng Juang
This letter proposes a wide locking range injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a dual band two-stage differential complementary metal-oxide-semiconductor (CMOS) ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8-V, the divider free-running frequencies are 1.36GHz and 2.3GHz, and at the incident power of 0dBm, the locking range is about 1.75GHz from the incident frequency 1.9GHz to 3.65GHz at low band and 2.55GHz from 2.95GHz to 5.5GHz at high band
IEEE Microwave and Wireless Components Letters | 2009
Sheng-Lyang Jang; Cheng-Chen Liu; Chun-Yi Wu; Miin-Horng Juang
A 5.6 GHz balanced voltage-controlled oscillator (VCO) is designed and implemented in a 0.18 mum CMOS 1P6M process. It consists of two single-ended complementary Colpitts LC-tank VCOs coupled by two pairs of varactors. At the supply voltage of 1.2 V, the output phase noise of the VCO is -119.13 dBc/Hz at 1MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is -190.29 dBc/Hz. Total VCO core power consumption is 2.4 mW. Tuning range is about 600 MHz, from 5.36 to 5.96 GHz, while the control voltage was tuned from 0 to 1.2 V.
IEEE Microwave and Wireless Components Letters | 2010
Sheng-Lyang Jang; Chih-Chieh Shih; Cheng-Chen Liu; Miin-Horng Juang
This letter presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two complementary cross-coupled voltage-controlled oscillators (VCOs) with two tail inductors. The two differential VCOs are coupled via two tail inductors to form a quadrature VCO. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm CMOS technology and the die area is 0.83 × 0.96 mm2. At the supply voltage of 1.45 V, the free-running frequency of the QVCO is tunable from 4.94 to 5.22 GHz as the tuning voltage is varied from 0.0 to 1.0 V. The total power consumption is 8.7 mW and the measured phase noise at 1 MHz frequency offset is -124.58 dBc/Hz at the oscillation frequency of 5.15 GHz and the figure of merit (FOM) of the proposed QVCO is -189.42 dBc/Hz.
IEEE Microwave and Wireless Components Letters | 2008
Sheng-Lyang Jang; Stewart Huang; Chien-Feng Lee; Miin-Horng Juang
This letter presents a new quadrature voltage-controlled oscillator (QVCO). The LC-tank QVCO consists of two first-harmonic injection-locked oscillators (ILOs). The outputs of one ILO are injected to the gates of the tail transistors on the other ILO and vice versa so as to force the two ILOs operate in quadrature. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.582 times 0.972 mm2. At the supply voltage of 1.0 V, the total power consumption is 8.0 mW. The free-running frequency of the QVCO is tunable from 5.31 GHz to 5.75 GHz as the tuning voltage is varied from 0.0 V to 1.0 V. The measured phase noise at 1 MHz offset is -120.01 dBc/Hz at the oscillation frequency of 5.31 GHz and the figure of merit (FOM) of the proposed QVCO is about -185.48 dBc/Hz.
IEEE Microwave and Wireless Components Letters | 2009
Sheng-Lyang Jang; Chi-Wen Lin; Cheng-Chen Liu; Miin-Horng Juang
This letter presents a wide-locking range, body-injected, injection locked frequency divider (ILFD) with tunable active inductors (TAIs) and variable division ratio. The ILFD was fabricated in the 0.18 mum 1P6M CMOS technology, and it has the modulus of 2, 3, 4, and 5, and can be used as a first-harmonic injection-locked oscillator (ILO). The divide-by-3 function is performed by injecting differential a signal to the bodies of cross-coupled transistors in the VCO. At the supply voltage of 1.5 V, the free-running divider is tunable from 0.53 to 1.72 GHz. At the incident power of 0 dBm the operation range in the first-harmonic ILO is from the incident frequency 0.53 to 3.2 GHz. The operation range in the divide-by-3 (divide-by-2) mode is about 3.59 (4.13) GHz, from the incident frequency 1.55 to 5.14 (0.87 to 5.0) GHz.
IEEE Microwave and Wireless Components Letters | 2009
Sheng-Lyang Jang; Ren-Kai Yang; C.W. Chang; Miin-Horng Juang
A new wide-locking range multi-modulus LC-tank injection locked frequency divider (ILFD) is proposed and was fabricated in a 0.18 mum CMOS process. The ILFD circuit is realized with a complementary MOS LC-tank oscillator and an injection composite composed of an inductor in series with an injection MOS. The two output terminals of the injection composite are connected to the resonator outputs. The ILFD can be used as a first-harmonic oscillator (ILO), even-modulo or odd-modulo oscillator depending upon the incident frequency of injection signal. At the supply voltage of 1.5 V, the free-running frequency is from 4.85 to 5.13 GHz, the current and power consumption of the divider without buffers are 2.78 and 4.17 mW, respectively. At the incident power of 0 dBm, the locking range in the divide-by-1(2, 3, 4) mode is from the incident frequency 3.72 to 8.69 (8.42 to 10.95, 13.66 to 16.03, 19.13 to 20.5) GHz.
Solid-state Electronics | 2001
Chuan-Chou Hwang; Miin-Horng Juang; Ming-Jiunn Lai; Cheng-Chung Jaing; Jyh-Shin Chen; Stewart Huang; Huang-Chung Cheng
Abstract This investigation reports the effect of rapid-thermal-annealing (RTA) on metallic barrier TiN against the interdiffusions of Ti and Si into barium strontium titanate (BST) in Pt/BST/Pt/TiN/Ti/Si capacitors. In the integration of BST capacitors, the thermal budget of the BST deposition would cause the inter-diffusions of Ti and Si from Ti adhesion layer and Si plug respectively. This event would degrade the BST capacitors. To address this issue, rapid-thermal-annealed TiN barriers were deposited between the bottom electrode Pt and adhesion layer Ti. Optimal RTA condition for TiN were found in this experiment. Excellent electrical characteristics of Pt/BST/Pt/TiN/Ti/Si capacitors, including high dielectric constant (er=320), low leakage current (1.5×10−8 A/cm2) under 0.1 MV/cm, and greater than 10 year lifetime under 1.6 MV/cm were obtained with Ar+O2 mixed ambient at a low substrate temperature (300°C).