Cheng-Chieh Yu
National Taipei University of Technology
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Cheng-Chieh Yu.
IEEE Transactions on Power Electronics | 2014
Yuh-Shyan Hwang; Chia-Cheng Lei; Yao-Wei Yang; Jiann-Jong Chen; Cheng-Chieh Yu
A low-voltage and low-control-loss RF-dc rectifier with high power conversion efficiency (PCE) at 13.56 MHz band is presented in this paper. This is achieved by utilizing novel reducing reverse loss (RRL) techniques to reduce the reverse leakage current loss. Higher output voltage can also be generated by the multistage stacking method with RRL technology. A boost-type front-end converter composed of an RF-dc rectifier with the RRL technique and a boost converter operating in a discontinuous-conduction mode are also proposed. The single-stage, three-stage pump-type RF-dc rectifier and the boost-type front-end rectifier have been implemented in TSMC 0.18 μm 1P6M technology. Experimental results show that the maximum PCE of the single-stage and three-stage pump-type RF-dc active rectifiers are 68.6% and 67.9% with input powers of 4.9 and 12.8 dB·m, respectively. The maximum PCE of the boost-type front-end converter is 41.3% with 1.2 dB·m input power.
International Journal of Circuit Theory and Applications | 2013
Jiann-Jong Chen; Bo-Han Hwang; Yan-Chong Jhang; Yuh-Shyan Hwang; Cheng-Chieh Yu
SUMMARY A new fast-response buck converter using accelerated pulse-width-modulation techniques is proposed in this article. The benefits of the accelerated pulse-width-modulation technique is fast-transient response, simple-compensation design, and no requirement for slope compensation; furthermore, some power management problems are minimized, such as EMI (Electro Magnetic Interference), size, design complexity, and cost. The traditional voltage-mode speed is slower with the transient response, so an accelerated pulse-width-modulation technique is used to solve the problem of slowed transient response in this article. The proposed buck converter has excellent conversion efficiency with a wide load conditions. The proposed buck converter has been fabricated with TSMC 0.35 µm CMOS 2P4M processes, and the total chip area is 1.32 × 1.22 mm2. Maximum output current is 300 mA when the output voltage equals 1.8 V. When the supply voltage is 3.6 V, the output voltage can be 1–2.6 V. Maximum transient response is less than 5 µs. The simulation and experimental results are presented in this article. Copyright
international conference on power electronics and drive systems | 2013
Hong-Yi Yang; Tse-Hsu Wu; Jiann-Jong Chen; Yuh-Shyan Hwang; Cheng-Chieh Yu
The omnipotent Li-Ion battery charger with multimode controlled techniques is presented in this paper. The proposed chip can create a reversible three-stage linear Li-Ion battery charger and is designed with TSMC 0.35μm DPQM CMOS processes. The three-stage charger functions include trickle-current charging, large-current charging and constant-voltage charging. This technique can reduce the damage of Li-Ion battery. The design of structure, which creates an omnipotent charger, combines with the reversible three-stage charger; that is adapts to any Li-Ion batteries. The proposed circuit can adjust the maximum charge current of 350mA, the constant voltage is set to 4.2V. Input voltage of the proposed circuit is from 4.4V to 4.8V. The average efficiency of the proposed charger is about 79%. The omnipotent charger can precisely provide VOUT where range is from 2.2V to 4.2V. The chip area is 1.5×1.5mm2.
IEEE Sensors Journal | 2016
Yuh-Shyan Hwang; Jiann-Jong Chen; Bor-Han Lai; Yi-Tsen Ku; Cheng-Chieh Yu
This paper presents a fast-transient boost converter with noise-reduction techniques for wireless sensor networks. The modulator can be directly inputted by 0.8-1.2 V for 1.8 V output. The proposed low electromagnetic interference (EMI) boost converter is based on a fast delta-sigma controller. This paper proposes a fast delta-sigma modulator for a boost converter to solve the EMI problem. The proposed converter complies with Federal Communication Commission class B conducted emission limits, in which the harmonic level must be lower than -48 dBμV for frequency from 0.45 to 30 MHz. The measured results show that the maximum efficiency of the proposed converter is 90%, and the recovery time is 4 μs from heavy to light load and 8 μs from light to heavy load. The chip was fabricated in Taiwan Semiconductor Manufacturing Co., Ltd. 1P6M 0.18-μm complementary metal-oxide-semiconductor process, and the chip area is ~0.85 mm2. It is designed to operate from 1 to 2 MHz with a 3.3-μH inductor and a 10-μF output capacitor. The proposed converter output spectrum is lower than -70 dBm or -40 dBμV.
international symposium on circuits and systems | 2012
Bo-Han Hwang; Bin-Nan Sheen; Jiann-Jong Chen; Yuh-Shyan Hwang; Cheng-Chieh Yu
A low-voltage positive buck-boost converter using average-current-controlled techniques is proposed in this paper. The benefit of the average-current-controlled circuit is that it does not need to use slope compensation, furthermore, it can reduce some power management problems such as cost, design complexity, size, and EMI. The advantages of the low-voltage operational amplifier are that it has lower power dynamic consumption and also can operate at low supply voltage. The proposed low-voltage positive buck-boost converter using the active-current-sensing circuit and average-current-controlled circuit techniques can work stably without slope compensation even when the duty cycle is higher than 50%. The proposed design circuit has been fabricated with TSMC 0.35μm CMOS 2P4M processes, the total chip area is 2.46 × 2.47mm2. When the supply voltage is 1.5V, the output voltage range is between 0.8V~3.3V.
IEEE Sensors Journal | 2016
Jiann-Jong Chen; Yuh-Shyan Hwang; Jih-Hua Yu; Yi-Tsen Ku; Cheng-Chieh Yu
This paper presents a low electromagnetic interference buck converter for wireless sensor networks with the spur-reduction techniques. The proposed buck converter uses the third-order delta-sigma modulator (DSM) with its noise-shaping characteristic to achieve low output noise. The DSM is designed with the chopper-stabilization techniques, which further reduces the impacts of low-frequency noises, such as flicker noise and offset voltage. The proposed buck converter also adopts fast transient path in order to get a fast transient response. The proposed buck converter has been fabricated with a TSMC 0.35-μm CMOS 2P4M process. The area of the whole chip is 2.18 mm2. Compared with previous works, the noise floor of the proposed converters output is below -76 dBm, which is lower than others. The settling time of the proposed converters output is ~20 μs with the load current skipping between 50 and 500 mA, that is faster than previous works, too. Moreover, the peak efficiency of the proposed converter is better and equals to 90%.
international conference on applied system innovation | 2017
Kun-Da Wu; Sheng-Shing He; Xiang-Ren Rao; Yuh-Shyan Hwang; Jiann-Jong Chen; Yi-Tsen Ku; Cheng-Chieh Yu
This paper proposed a new wide-bandwidth hybrid supply modulator for LTE-A power amplifier. The proposed wide-bandwidth hybrid supply modulator is for long term evolution (LTE)-advanced power amplifier. This proposed modulator uses simple linear amplifier structure to achieve 100MHz tracking speed. This proposed modulator proposes a bandwidth control to improve the efficiency of the supply modulator in low bandwidth envelope. The proposed buck converter uses a power MOS width control technique to reduce the power losses in light load. The paper also presented a new sensing circuit to reduce the chip area, power consumption, and propagation delay. This modulator was fabricated with a 0.18µm CMOS process and the chip area is 1561µm × 1178µm. With 3.5V input voltage, the output voltage can be regulated between 0.9 and 2.3V. Furthermore, it achieves the peak efficiency of 81% under the condition of the output power POUT equal to 4.5W. The experimental results demonstrate that tracking speed of this work is faster than the other state-of-the-art designs.
international conference on applied system innovation | 2017
Kun-Da Wu; Ming-Hao Chiu; Chih-Shiun Jheng; Jiann-Jong Chen; Yuh-Shyan Hwang; Yi-Tsen Ku; Cheng-Chieh Yu
This paper presents a multiphase buck converter with optimum-damping-control and current-balanced techniques. The proposed optimum-damping-control and current-balanced techniques can achieve current balance to avoid output current flow in one phase. The phase controller is used to control multiphase buck converter. This configuration provides wide output current range from 400 mA to 4 A. It also has low output voltage and current ripple. The proposed buck converter has been fabricated in TSMC 0.35µm CMOS 2P4M technology, and the areas of the chips are 1.896 mm × 1.852 mm and 1.339 mm × 1.439 mm. The power efficiency can be up to 89.5%.
international conference on electron devices and solid-state circuits | 2016
Tai-Wei Ke; Yu-Hsuan Cheng; Yuh-Shyan Hwang; Jiann-Jong Chen; Yi-Tsen Ku; Cheng-Chieh Yu
A high efficient and wide-bandwidth supply modulator with power switch controlled technique (SMPSC) is presented in this paper. The supply modulator offers dynamic output voltage for RF PA power supply application. Improving the efficiency of the RF PA in RF transceiver system. The parallel architecture of supply modulator has better efficiency and wide output bandwidth. And has the capability of outputting large load current. SMPSC technique follows voltage level of input envelope signal to change output power switch of the switching converter and improve the efficiency. The proposed supply modulator has been fabricated with 180nm CMOS process. The chip area is 1.2μm × 1.2μm. SMPSC can work in static output or dynamic output mode. With an input supply voltage of 3.3 V, the output voltage range can be regulated from 0.5V to 3V. The maximum operation input envelope signal frequency is 20MHz. Experimental results demonstrate that the maximum output current is 600mA with 5 Ω equivalent load.
international conference on electron devices and solid-state circuits | 2016
Yuh-Shyan Hwang; Rong-Lian Shih; Po-Han Fu; Yu-Jing Hsiao; Jiann-Jong Chen; Cheng-Chieh Yu
A compact charge-pump boost converter with fast transient response and high efficiency is presented in this paper. One inherent advantage of charge-pump boost converter is its fast transient response for load variation, and the other is current stress on the output capacitor of the charge-pump boost converter smaller than conventional boost converter. In order to improve the transient response, hysteretic compensated technique is chosen. The proposed converter was fabricated with a 0.35-μm CMOS process. The chip area is 1309μm × 1496μm. With an input voltage of 3.3V, the output voltage can be regulated from 3.6V to 5.1V. Furthermore, it achieves the peak efficiency of 93.2% under the condition of load current IOUT=60mA. Experimental results demonstrate that transient response of this work is faster than other state-of-the-art designs. The measured transient response is only 4μs when the load current changes from heavy load to light load and vice versa.