Yuh-Shyan Hwang

A High-Efficiency Multimode Li–Ion Battery Charger With Variable Current Source and Controlling Previous-Stage Supply Voltage

A high-efficiency multimode Li-ion battery charger with variable current source and controlling previous-stage supply voltage is presented in this paper. Using variable current source can achieve the goal of constant-current mode to charge the battery and control previous-stage supply voltage which could increase the efficiency of the multimode battery charger. Moreover, the charging mode adopted in this charger is applied by two types of dual-mode strategy decided by the value of the equivalent series resistance of the Li-ion battery. This technique will reduce the damage of Li-ion battery. The Li-ion battery charger is designed with 0.35-mum CMOS double-poly four-metal processes. The experimental results show that the charger works well and the theoretical analysis can be confirmed. The average power efficiency of the multimode Li-Ion battery charger can be up to 91.2% under the average power of 1.24 W, and the accuracy of the adaptive reference voltage is up to 97.3%. The chip area is only 1.32 times 0.95 mm2.

New Compact CMOS Li-Ion Battery Charger Using Charge-Pump Technique for Portable Applications

This paper presents a new compact CMOS Li-Ion battery charger for portable applications that uses a charge-pump technique. The proposed charger features a small chip size and a simple circuit structure. Additionally, it provides basic functions with voltage/current detection, end-of-charge detection, and charging speed control. The charger operates in dual-mode and is supported in the trickle/large constant-current mode to constant-voltage mode with different charging rates. This charger is implemented using a TSMC 0.35-mum CMOS process with a 5-V power supply. The output voltage is almost 4.2 V, and the maximum charging current reaches 700 mA. It has 67.89% power efficiency, 837-mW chip power dissipation, and only 1.455times1.348 mm2 in chip area including pads

CMOS four-quadrant multiplier using bias feedback techniques

A new wide-range CMOS four-quadrant multiplier using the bias feedback techniques is presented. Simulation results show that for a power supply of /spl plusmn/5 V, the linear range is over 14 V and the linearity error is less than 1% over a 13 V input range. Experimental results show that the linear range is over /spl plusmn/1 V. The results will be useful in analog signal processing applications. >

Multiphase sinusoidal oscillator using second-generation current conveyors

Abstract A multiphase sinusoidal oscillator using second-generation current conveyors is presented. The oscillator can generate n signals which are equal in amplitude and equally spaced in phase. The oscillation frequency of each phase is independently controlled by a grounded resistor, which makes it easy to convert into a voltage-controlled multiphase oscillator. The proposed circuit is suitable for IC fabrication because all the passive elements are grounded. Experimental results are given to verify the theoretical analysis.

An Adaptive Output Current Estimation Circuit for a Primary-Side Controlled LED Driver

A primary-side controlled method is commonly used in flyback LED driver to regulate output current by employing an auxiliary winding. However, owing to intrinsic propagation delay in real-world circuits, a primary-side controlled flyback converter experiences a worse line regulation. This paper proposes a smart output current estimation scheme to improve line regulation for constant on-time control, and it can be compatible with the current flyback topology. A 9.5-W prototype of the proposed flyback LED driver has been fabricated in Nuvoton Technology Corporation 0.6-μm 5-V/40-V CMOS process. The maximum switching frequency is set to around 100 kHz with universal-line input, single-stage power factor correction for LED lighting applications. Experimental results prove that the proposed scheme can improve the line regulation within 1.5% and the power efficiency can be up to 89.7%.

A High-Efficiency Positive Buck–Boost Converter With Mode-Select Circuit and Feed-Forward Techniques

This paper presents a high-efficiency positive buck- boost converter with mode-select circuits and feed-forward techniques. Four power transistors produce more conduction and more switching losses when the positive buck-boost converter operates in buck-boost mode. Utilizing the mode-select circuit, the proposed converter can decrease the loss of switches and let the positive buck-boost converter operate in buck, buck-boost, or boost mode. By adding feed-forward techniques, the proposed converter can improve transient response when the supply voltages are changed. The proposed converter has been fabricated with TSMC 0.35-μm CMOS 2P4M processes. The total chip area is 2.59 × 2.74 mm2 (with PADs), the output voltage is 3.3 V, and the regulated supply voltage range is from 2.5-5 V. Its switching frequency is 500 kHz and the maximum power efficiency is 91.6% as the load current equals 150 mA.

A New CMOS Analog Front End for RFID Tags

This paper presents a new CMOS integrated analog front-end circuit for 13.56-MHz radio-frequency identification tags. The proposed analog front end consists of a novel CMOS rectified voltage multiplier, a voltage regulator, and a new frequency-shift keying (FSK) demodulator. The proposed single-stage rectifier employing only a PMOS/NMOS pass transistor, an inverter, and one capacitor gets minimal active area and enhances the power conversion efficiency. Moreover, a new technique is used in the proposed FSK demodulator, which includes the data recovery circuit, the multiplexer, the shift register, the phase frequency detector, and the charge-pump circuit. The analog front end has been fabricated in a CMOS 0.35-mum 2P4M technology. The demodulator circuit supports a data rate of 10 kb/s to 1 Mb/s. The power consumption is as low as 0.96 mW, and the chip area without pads is only 0.74 mm times 0.43 mm. Experimental results show that the proposed analog front end works well and confirms the theoretical analysis.

New current mode biquad filters using current followers

Three new configurations for realizing the current-mode biquad filters using current followers (CFs) are presented. They can realize the allpass, notch, lowpass, bandpass, and highpass filters. Some of the proposed circuits can be directly cascaded without buffers. Two configurations can generate two kinds of filtering functions simultaneously. The natural frequency /spl omega//sub o/ of the proposed filters will be insensitive to the current tracking error of the CF. Experimental results that confirm the theoretical analysis are obtained. >

Systematic Generation of Current-Mode Linear Transformation Filters Based on Multiple Output CCIIs

A transformation called current-mode linear transformation (CMLT) and its filter applications using multiple output second-generation current conveyors (MOCCIIs) are presented. The systematic method is developed to realize CMLT MOCCII-based filters efficiently. Based on the proposed design tables, we can synthesize high-order current-mode all-pole and elliptic filters with MOCCIIs, grounded resistors and capacitors. Moreover, the high-frequency elliptic filter can also be efficiently realized by adding capacitors to the relative all-pole filter, although floating capacitors are needed. Third-order Chebychev and elliptic lowpass filters are described in this paper. Experimental results that confirm the theoretical analysis are obtained. Furthermore, the proposed circuits can be extended to higher-order filters.

Hysteresis-Current-Controlled Buck Converter Suitable for Li-Ion Battery Charger

A new hysteresis-current-controlled (HCC) buck converter suitable for Li-ion battery charger is presented in this paper. The technique adopted in this charger is constant current/constant voltage dual mode, which is decided by the value of internal resistance of Li-ion battery. This technique will degrade the damage of Li-ion battery and improve the power efficiency of charger. The Li-ion battery charger is designed with 0.35 - mum CMOS DPQM processes. The simulation results show that the charger works well and confirms with theoretical analysis. The power efficiency of charger can be up to 82% under the average power of 825 mW. The chip area is only 1.71times 1.52 mm 2.