Chenxin Zhu

Performance enhancement of multilevel cell nonvolatile memory by using a bandgap engineered high-κ trapping layer

A high-κ based charge trap flash (CTF) memory structure using bandgap engineered trapping layer HfO2/Al2O3/HfO2 (HAH) has been demonstrated for multilevel cell applications. Compared to a single HfO2 trapping layer, a CTF memory device based on the HAH trapping layer exhibits a larger memory window of 9.2 V, faster program/erase speed, and significantly improved data retention. Enhancements of memory performance and reliability are attributed to the modulation of charge distribution by bandgap engineering in trapping layer. The findings provide a guide for future design of CTF.

Isolated nanographene crystals for nano-floating gate in charge trapping memory

Graphene exhibits unique electronic properties, and its low dimensionality, structural robustness, and high work-function make it very promising as the charge storage media for memory applications. Along with the development of miniaturized and scaled up devices, nanostructured graphene emerges as an ideal material candidate. Here we proposed a novel non-volatile charge trapping memory utilizing isolate and uniformly distributed nanographene crystals as nano-floating gate with controllable capacity and excellent uniformity. Nanographene charge trapping memory shows large memory window (4.5u2005V) at low operation voltage (±8u2005V), good retention (>10 years), chemical and thermal stability (1000°C), as well as tunable memory performance employing with different tunneling layers. The fabrication of such memory structure is compatible with existing semiconductor processing thus has promise on low-cost integrated nanoscale memory applications.

In situ electron holography study of charge distribution in high-κ charge-trapping memory.

Charge-trapping memory with high-κ insulator films is a candidate for future memory devices. Many efforts with different indirect methods have been made to confirm the trapping position of the charges, but the reported results in the literatures are contrary, from the bottom to the top of the trapping layers. Here we characterize the local charge distribution in the high-κ dielectric stacks under different bias with in situ electron holography. The retrieved phase change induced by external bias strength is visualized with high spatial resolution and the negative charges aggregated on the interface between Al₂O₃ block layer and HfO₂ trapping layer are confirmed. Moreover, the positive charges are discovered near the interface between HfO₂ and SiO₂ films, which may have an impact on the performance of the charge-trapping memory but were neglected in previous models and theory.

Investigation on interface related charge trap and loss characteristics of high-k based trapping structures by electrostatic force microscopy

Charge trap and loss characteristics of high-k based trapping layer structures are investigated by electrostatic force microscopy, which proves that the interfaces provide dominate trap sites. The effects of post-deposition anneal of HfO2 and Al2O3 single layer are determined. Based on aforementioned findings, we demonstrate the HfO2/Al2O3 bi-layers trapping structure with improved performance. The lateral charge spreading properties are also evaluated by extracted diffusion coefficients to further understand the interface effect. The study may provide insights into fundamental assessment and optimization for charge trapping structures, especially for high-density NAND flash applications.

Improved performance of non-volatile memory with Au-Al2O3 core-shell nanocrystals embedded in HfO2 matrix

In this paper, we demonstrate a charge trapping memory with Au-Al2O3 core-shell nanocrystals (NCs) embedded in HfO2 high-k dielectric. Transmission electron microscopy images clearly show the Au NCs surrounded by Al2O3 shells in the HfO2 matrix. Electrical measurements show a considerable memory window (3.6u2009V at ±8u2009V), low program/erase operation voltages, and good endurance. Particularly, data retention is improved both at room temperature and high temperature compared to the NC structure without shell. An energy band model is given for the improved retention characteristic. This Au-Al2O3 core-shell NCs memory device has a strong potential for future high-performance nonvolatile memory application.

Effects of high-temperature O2 annealing on Al2O3 blocking layer and Al2O3/Si3N4 interface for MANOS structures

In this paper, we have investigated the effects of O2 post-deposition annealing (PDA) on metal/Al2O3/Si3N4/SiO2/Si (MANOS) devices. Compared with low-energy plasma oxygen pre-treatment and the N2 PDA process, the O2 PDA process can lead to a significant retention improvement. The improvement is attributed to the removal of oxygen vacancies in Al2O3 block oxide and the oxygen incorporation at the Si3N4/Al2O3 interfacial layer which is determined by x-ray photoelectron spectroscopy (XPS) depth profiling and electrical characteristics. Metal/Al2O3/SiO2/Si (MAOS) devices are also studied to confirm these effects. As a result, we consider that the O2 PDA process is a crucial process for future MANOS-type memory devices.

Performance-improved nonvolatile memory with aluminum nanocrystals embedded in Al2O3 for high temperature applications

In this paper, we demonstrate a charge trapping memory with aluminum nanocrystals (Al- NCs) embedded in Al2O3 high-k dielectric. Compared to metal/Al2O3/SiO2/Si structure, this device exhibits a larger memory window (6.7u2009V atu2009±12u2009V), faster program/erase speed and good endurance. In particular, data retention is improved greatly both at room temperature and in high-temperature (up to 150u2009°C). The results indicate that the device with the embedding Al-NCs in Al2O3 film has a strong potential for future high-performance nonvolatile memory application.

Effect of bandgap engineering on the performance and reliability of a high-k based nanoscale charge trap flash memory

This paper investigates the performance of a bandgap engineered charge trapping structure consisting of HfO2/Al2O3/HfO2 (HAH) multilayer in comparison with a structure with a single HfO2 trapping layer. The study on the role of the inserted Al2O3 layer in improving the performance and reliability shows that the enhancement in charge trapping capability from the interfaces makes a considerable contribution to the larger memory window (7.8xa0V for the HAH 5/2/5xa0nm device and 3xa0V for the single HfO2 layer device, both under 12xa0V, 0.1xa0s program condition). The modulation of trapped charge distribution is proved by investigating the effect of varying the inserted Al2O3 layer position on program/erase (P/E) speed and retention characteristics, which is a crucial factor in improving the performance and reliability. This study can provide a guide for future designs of charge trap flash memories.

Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer

This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer. In comparison to a memory capacitor with a single HfO2 trapping layer, the erase speed of a memory capacitor with a stacked HfO2/Ta2O5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔVFB = 4 V, the device with a stacked HfO2/Ta2O5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO2/Ta2O5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application.

Investigation of charge trap and loss characteristics for charge trap memory by electrostatic force microscopy

In this work, we employ the electrostatic force microscopy (EFM) technique to investigate the charge trapping and loss properties of Hf-based trapping structures by contact potential differences (CPDs) measurement. For different samples, the electron densities after injection and after 2 hours retention time are extracted from the measured CPDs. The HfO2 material shows higher charge trapping capability to Al2O3 under the same condition of charge injection. The charge decay phenomenon is effectively inhibited in high-k materials with post deposition anneal (PDA) process. Meanwhile, by the introduction of the Al2O3/HfO2 interface, the bi-layer structure exhibits significantly improved charge trapping capability along with acceptable charge loss. The structure dependence and process dependence of the high-k materials properties are investigated.