Cheon-Soo Kim

Subharmonically pumped CMOS frequency conversion (up and down) circuits for 2-GHz WCDMA direct-conversion transceiver

Subharmonically pumped frequency down- and upconversion circuits are implemented in 0.18-/spl mu/m mixed-mode CMOS technology for 2-GHz direct-conversion WCDMA transceiver applications. These circuits operate in quadrature double-balanced mode and a required octet-phases (0/spl deg/, 45/spl deg/, 90/spl deg/, 135/spl deg/, 180/spl deg/, 225/spl deg/, 270/spl deg/, and 315/spl deg/) local oscillator (LO) signal comes from an active multiphases LO generator composed of a polyphase filter and active 45/spl deg/ phase shifting circuits. For linearity improvement, predistortion compensation and negative feedback schemes are used in the frequency down- and upconversion circuits, respectively. The downconverter achieves a conversion voltage gain of 20 dB (to 1-M/spl Omega/ load), 4-dBm IIP3 (18-dBm OIP3 to 50-/spl Omega/ load), 41-dBm IIP2 and 8.5-dB DSB NF at 1-MHz IF frequency, consuming 13.4 mA from 1.8-V supply, in the WCDMA Rx band (2110-2170 MHz). The upconverter, operating as two switched gain modes in the WCDMA Tx band (1920-1980 MHz), consumes 19.4 mA from 1.8-V supply and shows 14.5-dB conversion power gain, 15 -dBm OIP3 (0.5-dBm IIP3) and -11 dBm P/sub 1dB/ at maximum gain mode. At minimum gain mode, it realizes -0.3-dB conversion loss, 10.7-dBm OIP3 (11-dBm IIP3) and 0-dBm P/sub 1dB/, respectively. 3GPP WCDMA modulation tests are performed for both up- and downconversion circuits and the results are discussed in this paper.

A fully-integrated +23-dBm CMOS triple cascode linear power amplifier with inner-parallel power control scheme

The low oxide breakdown voltage of CMOS power transistor and low power-added efficiency (PAE) at low power levels have been major challenging issues in the implementation of high-power linear power amplifiers (PAs), especially in deep sub-micron CMOS technology. In order to alleviate these problems, a triple cascode CMOS PA with inner-parallel power control scheme is presented. The proposed PA, fully-integrated in 0.18mum CMOS technology, delivers an output power of 23dBm with 35% PAE at 3.3V supply voltage. Since the thin-oxide transistors of the minimum feature size can be utilized as power transistors in the proposed PA, a high power gain of 19dB has been achieved even at single-stage. And PAE at an 8dB-backoff from the 1dB compression point (P1dB) of 20dBm has been measured as high as 12%

A 1 GHz-band low distortion up-converter with a linear in dB control VGA for digital TV tuner

A new exponential controlled variable gain amplifier (VGA) and an up-mixer have been integrated in a single chip using 0.35 /spl mu/m CMOS process. The gain of the VGA is controlled analog-linear in dB by using proposed a multi-stage multi-control R-r ladder structure to cover the wide gain control range. Up-converter shows a low distorted IF output signal over the wide RF input signal range of 50 MHz/spl sim/810 MHz for digital TV tuner. Measurements show that the gain control range of VGA is -48/spl sim/0 dB and the IIP3 of the overall up-converter is 27/spl sim/1 dBm, respectively. In addition, -3 dB frequency is measured to 1 GHz. The chip consumes 10 mA with a single 3.3 V power supply.

A CMOS centric 77GHz automotive radar architecture

A CMOS centric phase array radar architecture is proposed for long range detection with a high angular resolution and short range with a large field of view at once. And one channel transceiver is implemented in a 65nm CMOS technology and patch array antenna also fabricated on LTCC (Low Temperature Co-fired Ceramic) substrate for small form factor, low power radar. Measured 77GHz I/Q receiver showed a 22dB conversion gain with dynamic gain range of 76dB. Two kinds of VCO showed 69.6~81GHz and 75.2~79.2GHz tuning range. A gain of 14.3 dB and P1 dB of 10dBm is obtained at transformer coupled two-stage cascade power amplifier. All the measured results showed a good agreement with simulated one up to 110 GHz by modeling of passive/active test devices and EM (Electro Magnetic) simulations, and showed a the promising candidate for automotive radar applications.

A Centimeter Resolution, 10 m Range CMOS Impulse Radio Radar for Human Motion Monitoring

A single-chip impulse radio radar transceiver that enables high-resolution reception with enhanced signal to noise ratio (SNR) is proposed. The radar transceiver, consisting of a spectrum adjustable transmitter and a 100-ps resolution 4-channel sampling receiver, successfully demonstrates in/outdoor human walk tracing, stride-rate, and respiration measurements. The 4-channel sampling receiver, which is robust against pulse distortion, utilizes track and hold samplers and integrators while sharing a single low noise amplifier. By adopting embedded control logic, the sampling receiver achieves control flexibility as well as improved performance. A repetitive reception mode can proportionally increase the SNR of the receive pulse at the cost of a longer pulse acquisition time. DC offset and low-frequency coherent noise problems caused by on-board control clock signals are resolved with the radar architecture. The single chip radar transceiver is fabricated in a 130-nm CMOS technology occupying a chip area of 3.27 mm 2. The measured results show that echo pulses are recovered with a centimeter range resolution while consuming 80 mA from a supply voltage of 1.2 V.

A high-resolution short-range CMOS impulse radar for human walk tracking

A single-chip impulse radar transceiver is presented. A high-resolution, enhanced SNR and controllability are achieved with a proposed architecture. By controlling timing between the transmit (TX) pulse and sampling clock of the receiver, echo pulses from targets are received and recovered. The TX pulse can adjust its spectrum occupancy by changing impulse shape. The 4-channel sampling receiver consists of a low noise amplifier, track and hold samplers, integrators, and a cascaded triple delay locked loop. The embedded control logic allows the radar to enhance the SNR of the received pulse using an averaging technique, and to operate at multiple reception modes. The real-time radar system measurements show that echo pulses are recovered with ≥100-psec range resolution while consuming 80 mW from 1.2-V of Vdd. An indoor human walking trace is successfully recorded. The transceiver is fabricated in a 130-nm CMOS technology occupying chip area of 3.4 mm2.

Current reuse cross-coupling CMOS VCO using the center-tapped transformer in LC tank for digitally controlled oscillator

A current reuse cross-coupling transformer-based VCO with low phase noise and low power consumption was implemented in 0.13 mum CMOS. The oscillation frequency was tuned from 4.6 GHz to 6 GHz (26% tuning range) using two different-sized varactor that adjusted fine and coarse tuning. The measured phase noise at 5.0 GHz was -124 dBc/Hz (1 MHz offset) and maximum output power level was -5.5 dBm. The 0.4times0.3 mm2 core consumes very low power of 1.8 mW for 1.2 V and FOM has -196.2 dB.

A 77GHz CMOS array receiver, transmitter and antenna for low cost small size automotive radar

A 77GHz CMOS 4-channels receiver, transmitter with 3-outputs and array antenna architecture is proposed for low cost/small size automotive radar system, and implemented by using 65nm CMOS technology and LTCC substrate. Measured performance of CMOS transceiver, which included useful functions such as dual operation of long/short range detection, I/Q signal process and gain attenuation when near target detection, shows comparable performances to that of commercial SiGe radar chips. Especially, the transmitter consumes one third lower power compared to SiGe chips. These results confirm that it may be a promising candidate for low cost and small size car radar system.

Human detection based on the condition number in the non-stationary clutter environment using UWB impulse radar

In this paper, we propose a human detection method in non-stationary clutter environment using ultrawideband (UWB) impulse radar. We treat the foliage swaying in the wind as the non-stationary clutter. It is observed that the signal from the human body is more correlated than the signal from the non-stationary clutter. The method based on the condition number of correlation matrix is used to distinguish the human from the non-stationary clutter. The experimental results show that the proposed method shows better detection probability than the conventional method.

A merged structure of LNA & sub-harmonic mixer for multi-band DCR applications

A merged structure of variable gain LNA and sub-harmonic mixer is designed for multi-band direct conversion receiver (DCR) applications with a 0.18 /spl mu/m CMOS process. The circuit uses inductive peaking loads to increase the 3dB-bandwidth and achieves 22.7/spl sim/32dB conversion gain, 2.8/spl sim/4.1dB DSB NF, -10.5/spl sim/4.1dBm IIP3 and 5/spl sim/17.3 dBm IIP2 from a 800 MHz to 2.4 GHz input range. The variable gain range is 11.5 dB at 2.1 GHz and typical LO to RF isolation is less than -50 dBm, and DC offset voltage is less than 10 mV. The overall power consumption is 17 mW with a 1.8 V supply voltage and the chip size is 2.3 mm/spl times/1.2 mm.