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Dive into the research topics where Cher-Shiung Tsai is active.

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Featured researches published by Cher-Shiung Tsai.


Japanese Journal of Applied Physics | 2006

Trivalued Memory Circuit Using Metal–Oxide–Semiconductor Field-Effect Transistor Bipolar-Junction-Transistor Negative-Differential-Resistance Circuits Fabricated by Standard SiGe Process

Kwang-Jow Gan; Cher-Shiung Tsai; Dong-Shong Liang; Chun-Ming Wen; Yaw-Hwang Chen

A trivalued memory circuit based on two cascoded metal–oxide–semiconductor field-effect transistor bipolar-junction-transistor negative-differential-resistance (MOS-BJT-NDR) devices is investigated. The MOS-BJT-NDR device is made of MOS and BJT devices, but it can show the NDR current–voltage characteristic by suitably arranging the MOS parameters. We demonstrate a trivalued memory circuit using the two-peak MOS-BJT-NDR circuit as the driver and a resistor as the load. The MOS-BJT-NDR devices and memory circuits are fabricated by the standard 0.35 µm SiGe process.


international workshop on system on chip for real time applications | 2005

Novel voltage-controlled oscillator design by MOS-NDR devices and circuits

Dong-Shong Liang; Kwang-Jow Gan; Chung-Chih Hsiao; Cher-Shiung Tsai; Yaw-Hwang Chen; Shih-Yu Wane; Shun-Huo Kuo; Fene-Chang Chiang; Lone-Xian Su

This paper describes the design of a voltage-controlled oscillator (VCO) based on the negative differential resistance (NDR) devices. The NDR devices used in the work is fully composed by the metal-oxide-semiconductor field-effect-transistor (MOS) devices. This MOS-NDR device can exhibit the NDR characteristic in its current-voltage curve by suitably arranging MOS parameters. The VCO is constructed by three low-power MOS-NDR inverter. This novel VCO has a range of operation frequency from 151MHz to 268MHz. It consumes 24.5mW in its central frequency of 260MHz using a 2 V power supply. This VCO is fabricated by 0.35 /spl mu/m CMOS process and occupied an area of 120 /spl times/ 86 /spl mu/m/sup 2/.


Microelectronics Journal | 2011

Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process

Kwang-Jow Gan; Cher-Shiung Tsai; Yu-Kuang Li; J.J. Lu

We present a monostable-bistable transition logic element (MOBILE) based on the negative-differential-resistance (NDR) circuit. In particular, this circuit can be completely implemented using the standard BiCMOS process. A traditional MOBILE using two resonant tunneling diodes (RTD) connected in series is a functional logic circuit. The fabrication of RTD is utilized in the complicated molecular-beam-epitaxy (MBE) system. However, we present a MOBILE circuit that is completely made of standard Si-based metal-oxide-semiconductor field effect transistors and SiGe-based heterojunction bipolar transistors. By suitably determining the control voltages and input conditions, we can obtain the operation of the inverter, AND and OR logic gates. We also demonstrate the latch characteristic of this MOBILE circuit. This logic circuit is fabricated using the standard 0.35µm BiCMOS process without the need for the MBE system.


International Journal of Computer Theory and Engineering | 2013

Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit

Kwang-Jow Gan; Zhen-Kai Kao; Cher-Shiung Tsai; Din-Yuen Chan; Jian-Syong Huang

—In this paper, we propose a MOS-BJT-NDR circuit, which can show the negative-differential-resistance (NDR) characteristic in its current-voltage (I-V) curve. This NDR circuit is composed of standard Si-based metal-oxide-semiconductor field-effect transistor (MOS) and bipolar junction transistor (BJT). Therefore, we can implement the applications using the standard CMOS process. We demonstrate the design of some logic circuits using the series-connected CMOS-NDR circuit based on the monostable-bistable transition logic element (MOBILE) theory. This logic circuit is designed based on the standard 0.18 μm CMOS process.


international workshop on system on chip for real time applications | 2005

Logic circuit design based on MOS-NDR devices and circuits fabricated by CMOS process

Kwang-Jow Gan; Chung-Chih Hsiao; Shih-Yu Wang; Feng-Chang Chiang; Cher-Shiung Tsai; Yaw-Hwang Chen; Shun-Huo Kuo; Chi-Pin Chen; Dong-Shong Liang

We propose a new MOS-NDR device that is composed of the metal-oxide-semiconductor field-effect- transistor (MOS) devices. This device could exhibit the negative differential resistance (NDR) characteristics in the current-voltage characteristics by suitably modulating the MOS parameters. We design a logic circuit which can operate the inverter, NOR, and NAND gates. The devices and circuits are fabricated by the standard 0.35/spl mu/m CMOS process.


ieee conference on electron devices and solid-state circuits | 2005

Investigation of MOS-NDR Voltage Controlled Ring Oscillator Fabricated by CMOS Process

Kwang-Jow Gan; Dong-Shong Liang; Chung-Chih Hsiao; Cher-Shiung Tsai; Yaw-Hwang Chen

A voltage-controlled ring oscillator (VCO) based on novel MOS-NDR circuit is described. This MOS-NDR circuit is made of metal-oxide-semiconductor emiconductor ield-effect-transistor ( MOS) devices that can exhibit the negative differential resistance (NDR) current-voltage characteristic by suitably arranging the MOS parameters. The VCO is constructed by three low-power ower MOS-NDR inverters. This novel VCO has a range of operation frequency from 38MHz to 162MHz. It consumes 24mW in its central frequency of 118MHz using a 2V power supply. This VCO is fabricated by 0.35μm CMOS process and occupy an area of 0.015 mm2.


ieee conference on electron devices and solid-state circuits | 2007

Design of NDR-Based Multiple-Valued Multiplexer Using Standard SiGe Process

Kwang-Jow Gan; Yi-Jhih Lin; Yaw-Hwang Chen; Cher-Shiung Tsai; Pei-Hua Chang

The design of a eight-valued multiplexer using the negative differential resistance (NDR) circuit is demonstrated. The NDR circuit is made of one Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and two SiGe-based heterojunction bipolar transistors (HBT). During suitably arranging the MOS parameters, we can obtain the NDR characteristic in its combined current-voltage curve. First we design an eight-valued decoder using this MOS-HBT-NDR circuit, after that we demonstrate its application to an eight-valued multiplexer. The design and simulation of this NDR-based multiplexer is based on the standard 0.35 mum SiGe BiCMOS process.


ieee conference on electron devices and solid-state circuits | 2007

A VHF Oscillator Design Based on BJT Active Load Differential Amplifier

Cher-Shiung Tsai; Ming-Yuan Guo; Chien-Hua Chang; Shu-Yin Jiang; Ming-Hsin Lin; Kwang-Jow Gan; Pei-Hua Chang; Dong-Shong Liang; Yaw Hwang Chen

In this paper, we present a VHF (Very High Frequency) band oscillator which mainly composed of a BJT active load differential amplifier (Diff. amp). We use H-spice to verify that the active load differential amplifier oscillator output frequency is 900 MHz at 2.0 volts power supply under CIC 0.18 um-Si process. We also use discrete devices on bread board to prove the circuit is an oscillator circuit. Those experiments show such an oscillator can work stably from 3.8 to 5.9 volts. Their output frequency will be 161.1 MHz, 186.7 MHz under 3.8 volts and 5.9 volts respectively. We use FFT (Fast Fourier Transform) diagram to analyse these oscillators and shows SNR (Signal-to-Noise Ratio) values. Finally, those experimental results reveal that the oscillator is a nice voltage controlled oscillator (VCO) and also have good SNR characteristics.


asia pacific conference on circuits and systems | 2006

Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process

Kwang-Jow Gan; Dong-Shong Liang; Cher-Shiung Tsai; Yaw-Hwang Chen; Chun-Ming Wen

The MOS-HBT-NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) and heterojunction bipolar transistor (HBT) devices, but it can show the negative-differential-resistance (NDR) current-voltage characteristic by suitably arranging the MOS parameters. The authors demonstrate a five-valued logic circuit using the two-peak MOS-HBT-NDR circuit as the driver and another two-peak MOS-HBT-NDR circuit as the load. The design and simulation is based on the technique of the standard 0.35mum SiGe process


asia pacific conference on circuits and systems | 2006

Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process

Dong-Shong Liang; Cheng-Chi Tai; Kwang-Jow Gan; Cher-Shiung Tsai; Yaw-Hwang Chen

AND and NAND logic gate based on the negative differential resistance (NDR) device is demonstrated. This NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) devices that could exhibit the NDR characteristic in the current-voltage curve by suitably arranging the MOS parameters. The devices and circuits are implemented by the standard 0.35mum CMOS process

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Kwang-Jow Gan

National Chiayi University

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Wen-Kuan Yeh

National University of Kaohsiung

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Cheng-Chi Tai

National Cheng Kung University

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