Chi-Feng Weng

Nonvolatile polycrystalline silicon thin-film-transistor memory with oxide/nitride/oxide stack gate dielectrics and nanowire channels

In this work, the authors study a polycrystalline silicon thin-film transistor (poly-Si TFT) with oxide/nitride/oxide (ONO) stack gate dielectrics and multiple nanowire channels for the applications of both nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory and switch transistor. The proposed device named as nanowire SONOS-TFT has superior electrical characteristics of a transistor such as on/off current ratio, threshold voltage (Vth), and subthreshold slope due to the good gate control ability originated from fringing electrical field effects. Moreover, the proposed device under adequate operation scheme can exhibit high program/erase efficiency and good retention time characteristics at high temperature.

A low temperature fabrication of HfO2 films with supercritical CO2 fluid treatment

To improve the dielectric properties of sputter-deposited hafnium oxide (HfO2) films, the supercritical CO2 (SCCO2) fluid technology is introduced as a low temperature treatment. The ultrathin HfO2 films were deposited on p-type (100) silicon wafer by dc sputtering at room temperature and subsequently treated with SCCO2 fluids at 150°C to diminish the traps in the HfO2 films. After SCCO2 treatment, the interfacial parasitic oxide between the Si substrate and HfO2 layer is only about 5A, and the oxygen content of the HfO2 films apparently increased. From current-voltage (I-V) and capacitance-voltage (C-V) measurements, the leakage current density of the SCCO2-treated HfO2 films is repressed from 10−2to10−7A∕cm2 at electric field=3MV∕cm due to the reduction of traps in the HfO2 films. The equivalent oxide thickness also obviously decreased. Besides, the efficiency of terminating traps is relative to the pressure of the SCCO2 fluids.

Anomalous Capacitance Induced by GIDL in P-Channel LTPS TFTs

In this letter, a mechanism of anomalous capacitance in p-channel low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) was investigated. In general, the effective capacitance was only the overlap region and independent with the frequency in LTPS TFTs under the off state. However, our experimental results reveal that the capacitance was related with the leakage current and that it was dependent with the measurement frequencies when operated at the off-state region. The increase of the capacitance value is verified to be due to the increase of the electron capacitance originating from a gate-induced drain-leakage (GIDL) one. Nevertheless, the GIDL-induced electron capacitance can be suppressed by employing band-to-band hot electron stress.

Electrical Degradation of N-Channel Poly-Si TFT under AC Stress

Electrical Degradation of N-Channel Poly-Si TFT under AC Stress C. W. Chen, T. C. Chang,* P. T. Liu, H. Y. Lu, T. M. Tsai, C. F. Weng, C. W. Hu, and T. Y. Tseng Institute of Electronics, Department of Physics and Institute of Electro-Optical Engineering, Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung, Taiwan Department of Photonics and Display Institute, and Institute of Electro-Optical Engineering, National Chiao Tung University, Hsin-Chu, Taiwan National Nano Device Laboratory, Science-based Industry Park, Hsin-Chu, Taiwan

Self-Heating Effect Induced NBTI Degradation in Poly-Si TFTs under Dynamic Stress

In this work, the characteristics of a p-type polysilicon thin-film transistor (poly-Si TFT) with dynamic bias stress were investigated. The ac stress is operated with the constant drain voltage (15 V) and the varying gate voltage (0 to 15 V) to degrade the devices. There are some phenomena which cannot be completely explained by the typical negative bias temperature instability (NBTI) mechanism in the experiment. In addition to NBTI, we suggest that the self-heating effect might be involved, because the self-heating effect could raise the channel temperature and cause the dissociation of the Si-H bonds at the poly-Si/SiO 2 interface due to Joule heating. The released hydrogen reacts with SiO 2 and causes the fixed charge in the gate oxide. Thus, the degradation of the electrical characteristics of device is mainly dominated by the self-heating-induced NBTI effect.

A fabrication of germanium nanocrystal embedded in silicon-oxygen-nitride layer

The formation of germanium nanocrystals embedded in silicon-oxygen-nitride (SiON) layer acting as distributed charge storage elements is proposed in this work. A large memory window is observed due to the isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after the high-temperature oxidation of SiGeN layer. The nonvolatile memory device with the Ge nanocrystals embedded in SiON stack layer exhibits 4 V threshold voltage shift under 7 V write operation. Also, the sequent high-temperature oxidation of the SiGeN layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices..

Asymmetric Negative Bias Temperature Instability Degradation of Poly-Si TFTs under Static Stress

This work investigates the asymmetric negative bias temperature instability (NBTI) degradation of poly-Si thin film transistors (TFTs). Electric measurements of normal and reverse modes are employed to analyze degradation of threshold voltage, current, leakage current, and subthreshold swing. The results indicate that a nonuniform vertical electric field at the poly-Si/SiO 2 interface results in an asymmetric NBTI degradation. The trap generation density gradually diminishes from source to drain. This paper also presents energy diagrams to explain the experimental data; these indicate that asymmetric TFT degradation results from the distribution of the trap state induced by an asymmetric NBTI.

Self-Heating-Induced Negative Bias Temperature Instability in Poly-Si TFTs under Dynamic Stress

In this work the characteristics of p-type polysilicon thin-film transistors (poly-Si TFTs) with dynamic bias stress were investigated. The ac stress is operated with the constant drain voltage (15 V) and the varying gate voltage (0 V to -15 V) to degrade the devices. Because the self-heating effect could raise channel temperature, the Si-H bonds at the poly-Si/SiO 2 interface were broken due to Joule heating. The released hydrogen reacts with SiO 2 and causes the fixed charge in the gate oxide. Thus, the degradation of electrical characteristics of the device is mainly dominated by the self-heating-induced negative-bias-temperature instability effect.

Formation of Germanium Nanocrystals Embedded in a Silicon-Oxygen-Nitride Layer

The formation of germanium nanocrystals embedded in silicon-oxygen-nitride with distributed charge storage elements is proposed. A large memory window was observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after a high-temperature oxidized SiGeN layer. The Ge nanocrystals embedded in the SiON stack layer exhibited nonvolatile memory characteristics with the obvious threshold voltage shift under a bidirectional voltage sweep. Also, the manufacturing technology using the sequent high-temperature oxidation of the a-Si layer and the direct oxidation of the SiGeN layer is proposed, respectively, for the formation of a blocking oxide layer to enhance the performance of nonvolatile memory devices. The reliability characteristics, including retention time and endurance, are also advisable for the application of nonvolatile memory device.