ChiaHua Ho

A Highly Reliable Self-Aligned Graded Oxide WO x Resistance Memory: Conduction Mechanisms and Reliability

WOx formed by plasmas oxidation shows promising multi-bit/cell resistance memory characteristics (ChiaHua Ho et al., 2007). The simple memory is completely self-aligned, requiring no additional masks and has a small 6F2 cell size. In this work we introduce a graded oxide device that is highly reliable (250degC baking for > 2,000 hrs). The conduction mechanism and factors affecting the memory reliability are examined extensively.

A 2-bit/cell, Maskless, Self-Aligned Resistance Memory with High Thermal Stability

We report the first demonstration of a multilevel cell (MLC) resistance device using a self-aligned WOx film prepared by plasma oxidation. The 2-bit/cell operation is achieved by applying a series of 1.5 V programming pulses. The device shows high thermal stability and good data retention. The resistance change can be attributed to variable-range hopping and Ohmic transport mechanisms. This device has the potential for future low-voltage, 3-dimensional nonvolatile memory with multiple bits per layer. In addition, no additional mask is needed to form the self-aligned device.

CMOS Fully Compatible Embedded Non-Volatile Memory System With

We demonstrate a non-volatile CMOS fully compatible embedded memory cell with a hybrid resistive switching material, TiO₂-SiO₂, in a 0.18 μm node CMOS process. Both voltage-and temperature-dependent transports indicate that a Schottky-type resistance switching model dominates the TiO₂ based transition-metal-oxide resistive random access memory (TMO-RRAM) system. Data retention is improved by inserting a very thin SiO₂ layer between the bottom electrode and TiO₂ film to enhance the Schottky barrier height, while maintaining TiO₂ based RRAM characteristics.