Chiaki Takubo

Silicon interposer technology for high-density package

The achievement of rapid advances in integration density and performance of LSI devices is predicated on increasing the total number of Input/Output (I/O) and Power/Ground (P/G) terminals, which, in turn, leads to shrinking design rule of wiring and bump pitch on the organic substrate of a flip-chip package. However, decreasing the bump pitch and wiring rule raises the process cost of fabricating organic substrate. Moreover, it is difficult to obtain highly reliable connections between chip and organic substrate with smaller bumps due to the mismatching of the coefficient of the thermal expansion (CTE). To overcome these problems, a new interposer using silicon (Si) substrate with through plug is developed.

Development of 3-dimensional module package, "System Block Module"

As the mobile electronics equipment moves toward higher performance and miniaturizing, each IC package is required to be stacked for saving a package mounting area on a system board. This paper describes a newly developed 3-dimensional module package using the technology of the silicon device thinning, micro flip chip bonding and two types of via connection of print circuit board for vertical wirings. These technology has realized the high density packaging of over 4 ICs stacking for practical use.

Eutectic solder flip chip technology-bumping and assembly process development for CSP/BGA

Eutectic solder flip chip fabrication technology, through bumping to assembly process, has been developed. In bumping process, electroplating method and thick photo resist process could form eutectic solder bumps whose uniformity of height are less than 10% within wafer. Eutectic solder flip chip assembly process, which includes bonding, cleaning and underfilling, has been also developed. Bonding process of eutectic solder indicates good self-alignment. The excellent rosin cleaning was achieved by the ultrasonic cleaning process with Techno Care. In underfilling process, the underfill resin which can be applied to small stand-off have been chosen. Reliability tests for CSP and flip chip interconnection were carried out and confirmed the good reliability of fabrication process using eutectic solder flip chip technology.

Novel optoelectronic LSI packaging suitable for standard FR-4 printed wiring board with bandwidth capability of over 1 Tbps

A novel optoelectronic LSI package using a post-reflow optical-interface stacking technique (POST), which enables high speed operation at more than 10 Gbps/ch on the standard FR-4 PWB was proposed. The POST LSI package includes an interposer and an optical interface module. A slightly modified interposer is used where electrical contacts for high speed signals are added on the top surface. After the reflow process of the interposer, the optical interface module was connected to the interposer through the electrical contacts. The POST LSI package enables the use of the standard FR-4 solder reflow process for the optoelectronic LSI packaging, and realizes a cost-effective package with a bandwidth of over 1 Tbps

Extremely-compact and high-performance (160Gbps = 20GB/s) optical semiconductor module using lead frame embedded optoelectronic ferrule

A high-performance 160 Gbps (=20 GB/s) optical semiconductor module using an optoelectronic (OE) ferrule with the ultra-compact size of 4.4 times 4.5 times 1.0 mm3 was developed for the first time in the world. The ferrule is used as the interface of OE converter in our developed optoelectronic LSI package of over 1 Tbps, POST LSI package (post-reflow optical-interface stacking technique LSI package). The feature of this OE ferrule is to have fine-pitch lead frame electrodes formed by insert molding method, which realized highly reliable electric contacts and excellent electric characteristics of the module. Moreover, the high-density assembly of 12 ch optical semiconductor module coupling an optical semiconductor device and an optical fiber array was realized by a simple assembly process with high accuracy and high reliability.

Eutectic solder flip chip technology for chip scale package

Chip Scale Package (CSP) has been developed by applying the flip chip technology with the eutectic Sn/Pb solder bumps. The package size is only 1 mm larger than the chip size. The eutectic solder has advantages such as a good wettability to the electrodes, a strong self-alignment effect and a low melting point. So, it is quite suitable for a chip assembly onto the plastic substrate as well as the ceramic substrate. An electroplating method has been developed for the formation of the eutectic solder bumps. The barrier metals has been selected as Ti/Ni/Pd for higher barrier effect. The flip chip interconnection process has been also developed. The various kinds of the reliability of the interconnection portion were investigated using the test vehicle of the ceramic and plastic substrate. The results of the test confirmed the reliable fabrication of the CSP using the eutectic solder flip chip technology.

Hybrid optical interconnection module with built-in electrical power line for mobile phone using highly-flexible integrally-formed OE-FPC

In order to meet increasing demand for higher-speed signal transmission and smaller electromagnetic noise, we propose the hybrid optical interconnection module with built-in electrical power lines as highly practical optoelectronic interconnection in mobile phones. Highly-flexible integrally-formed OE-FPC with high productivity and reliability was utilized in this module. Optical semiconductor devices and ICs driving such optical devices were all mounted on the OE-FPC by ultrasonic flip-chip bonding method, realizing highly reliable module. With this hybrid optical interconnection module, high-speed signal transmission was demonstrated at over 10 Gbps/ch and such high-speed optical signal transmission was realized actually by the power supply through the low-resistance built-in electrical power lines.

A novel optoelectronic ferrule and easy ribbon fiber splicer for cost-effective optical interconnection

Attention has turned in recent years to optical interconnection as the most cost-effective solution to the problem of I/O bottlenecks in the wiring of conventional FR4 printed wiring boards. In this paper we propose a new configuration for the key element in realizing optical interconnections, a low-cost electrical/optical (E/O) converter module. We furthermore propose an easy splicer and a ribbonized coated-mountable fiber for multicore optical interconnections.

An ECL-compatible GaAs SCFL design method

A source-coupled FET logic (SCFL) circuit design method which provides compatibility with emitter-coupled logic (ECL) in terms of power supply voltage and logic level is described. The method considers device parameter variations ( Delta V/sub th/, Delta R, and Delta K), and changes in the ambient temperature. A -0.2 V threshold voltage (V/sub th/), a 0.9-V logic swing voltage (V/sub SW/), and a 0.35-V noise margin voltage (V/sub nm/) were obtained to achieve compatibility with the ECL 10 K series power supply voltage of -5.2 V. A 5-Gb/s as well as a 3-Gb/s operational 4-b multiplexer and demultiplexer IC have been developed using this circuit design method. >

A Novel Optoelectronic Ferrule for Cost-effective Optical Interconnection Modules

We developed an optoelectronic ferrule using hoop injection molding. By mounting a vertical cavity surface emitting laser (VCSEL) (or photo diode (PD)) directly on the end-face of the ferrule, an extremely simple and cost-effective optical interconnection module can be created.