Chien-Hsuan Liu
National Cheng Kung University
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Publication
Featured researches published by Chien-Hsuan Liu.
asia pacific conference on circuits and systems | 2006
Ruey-Lue Wang; Yan-Kuin Su; Chien-Hsuan Liu
In this paper, a two-stage cascaded power amplifier (PA), which consists of cascode topology, for ultrawideband (UWB) systems operating in the 3.1-4.8 GHz frequency range is presented. The shunt-shunt feedback is used to arrive at wideband matching. A three-section ladder output network is exploited to achieve excellent output match in a wideband fashion and to optimize the power performance. The PA is implemented by TSMC 0.18mm mixed signal/RF process. The measured results show the following performance: S21 of 20.7-dB, more than 10-dB input and output return loss, 5.8% maximum power-added-efficiency and 2.57dBm output P1dB with 15.57dB power gain at 3GHz
asia-pacific microwave conference | 2008
Ruey-Lue Wang; Shih-Chih Chen; Cheng-Lin Huang; Chien-Hsuan Liu; Yi-Shu Lin
In this work, a wideband CMOS LNA utilizing current-reused cascode topology is proposed. One series inductor and one shunt capacitor is inserted between two DC cascoded transistors in order that two transistors work as two cascaded common-source amplifiers under RF signals. Hence, higher power gain should be obtained. In general, more inductors are used to fulfill wideband matching and the current-reused topology. In this research, we designed an original wideband current-reused LNA previously. From the designed circuit structure, it can be found that three couples of inductors which are similar to center-tapped transformers. Hence, supply-feeding and matching inductors are combined into center-tapped transformers in order to save chip area.
ieee conference on electron devices and solid-state circuits | 2007
Chien-Hsuan Liu; Chia-Yo Chan; Ruey-Lue Wang; Yun-Kuin Su
In this paper, a low power current-reused voltage-controlled oscillator with source damping resistors is presented. It is designed by simulating optimum value of resistors. According to the simulation results, the output signals are symmetric and the 1/f3 region of the phase noise is reduced. The VCO1 is designed at 2.26 GHz. The measured phase noise at 100-kHz and 1-MHz offset frequencies are -101.87 and -121.66 dBc/Hz. With 1.8 V voltage supply, the power consumptions of the VCO is 1.62 mW. This circuit is fabricated by TSMC 0.18 um CMOS process.
IEEE Electron Device Letters | 2008
Chien-Hsuan Liu; Ruey-Lue Wang; Yan-Kuin Su; C.W. Tu; Ying-Zong Juang
In this letter, we investigate the performance degradation of nMOS transistors due to hot-carrier effect and load impedance mismatch. The DC and radio-frequency characteristics, such as drain current, threshold voltage, transconductance, output power, power-added efficiency, etc., are affected under hot-carrier effect. With load impedance mismatch, the transistors experience the reflected power from load and increase the energy of hot carriers. This effect will make DC and power performances degenerate heavily. In this letter, device characteristics were measured at 5.2 GHz.
IEEE Transactions on Device and Materials Reliability | 2010
Chien-Hsuan Liu; Ruey-Lue Wang; Yan-Kuin Su; Chih-Ho Tu; Ying-Zong Juang
Both the degradations of dc and RF characteristics of nMOS transistors due to hot-carrier effect and instantaneous high RF power stresses are presented in this paper. The drain current, threshold voltage, output power, and power-added efficient were degraded after the output power exceeded the power capacity. At this condition, the voltage between drain and gate became large and made the oxide soft breakdown happen. The load-pull system is used to set up the measurement for optimized input and output power matching networks. The shift of the optimum load impedance and constant power-gain circles for power match indicated that the parameters of the stressed cells were changed by the damage in the gate oxide. The signal distortion, gate voltage swing, and thermal effect were all considered in this paper. The cells were fabricated by a 0.18-μm CMOS process. All of the characteristics of the devices were measured at 5.2 GHz.
asia pacific conference on circuits and systems | 2008
Ruey-Lue Wang; Yan-Kuin Su; Chien-Hsuan Liu; San-Chi Hung; Pi-Jung Yang; Yi-Shu Lin
In this paper, a concurrent dual-band mixer with on-wafer baluns for multi-standard applications, such as WLAN, WiMAX, is presented. The operation frequency bands of this dual-band mixer are 2.4 GHz and 5 GHz, respectively. On-chip baluns are designed to transfer single-ended RF and LO signals into differential signals for the presented mixer. A topology of LC series-parallel resonance is used to arrive at dual-band characteristics. The simulated conversion gain is 5.5 dB and 5.8 dB, respectively. The 1 dB compression point, referred to input, is -14 dBm and the IIP3 is -3.5 dBm at 2.4 GHz. The RF return-loss at both bands is well below -10 dB. The isolations between three ports are all less than -60 dB. The double-side band noise factor, NFdsb, is about 10 dB. The total DC power consumption is 6.705 mW.
asia pacific conference on circuits and systems | 2006
Ruey-Lue Wang; Shih-Chih Chen; Hsiang-Chen Kuo; Chien-Hsuan Liu
The paper presents the design of a band group 1~5 UWB low noise amplifier in the range between 3.1 to 10.6GHz. The circuit consists of a two-stage topology to implement a low noise amplifier based on the TSMC 0.18-mum RF CMOS process. The first stage is the folded cascode configuration that is used to attain low-power dissipation and low supply voltage. Negative feedback is adopted to enhance the bandwidth of the first stage. In order to achieve simultaneously a high gain and ultra-wide bandwidth, the addition of a common-source stage behind the folded cascode circuit provides extra gain and gain flatness. A RLC shunt-shunt feedback is used to attain the broadband gain requirement of the second stage. The simulated results show the better performances of S21 above 12dB and noise figure below 3.6dB with the 3-dB bandwidth covering from 3.1GHz to 10.6GHz. The first-stage circuit of LNA drains 22mA from a 0.9V supply and the second-stage circuit of LNA drains 8mA from a 0.85V supply voltage. The total circuit consumes a very low power of 27mW. The chip area is 1.195mm×1.275 mm
international conference on innovative computing, information and control | 2008
Chien-Hsuan Liu; Ruey-Lue Wang; Chia-Yu Chen; Yan-Kuin Su
In this paper, a wide tuning range switched current-reused VCO for 2.5 GHz and 3.4 GHz WiMAX applications is presented. The frequency bands consist of eight switched sub-bands and cover 2.438-2.971 GHz and 3.104-3.786 GHz. The measured phase noise at 100-kHz and 1-MHz offset frequencies are -101.47 and -119.28 dBc/Hz at lower band and -103.99 and 122.28 dBc/Hz at higher band. With 1.5V voltage supply, the power consumption of the VCO is 2.886 mW. This circuit was fabricated by TSMC 0.18 m CMOS process.
ieee conference on electron devices and solid-state circuits | 2007
Ruey-Lue Wang; Chien-Hsuan Liu; Guo-Ruey Tsai; Yu-Feng Lin; Zhi-Cheng Lin; Yan-Kuin Su
In this paper, we presents a current-reused voltage-controlled oscillator which consists of one nmos transistor and one pmos transistor. The voltage controlled oscillator (VCO) is designed for 2.45 GHz operation. The study is based on the TSMC 0.18-um CMOS processes. The degeneration source resistors are used to improve magnitude symmetry of output signals. Additional source capacitors which are parallel with source resistors are used to improve phase noise. Measurement results show -94.6 and -116 dBc/Hz at 100-kHz and 1-MHz offset, respectively, when the oscillation frequency is at 2.45 GHz. In this work, the core current is 0.35 mA from a 1.8-V supply. The tuning range is from 2.24 to 2.52 GHz under the tuning voltage between 0 to 2 V.
midwest symposium on circuits and systems | 2007
Shih-Chih Chen; Ruey-Lue Wang; Cheng-Lung Tsai; Jui-Hao Shang; Chien-Hsuan Liu
This paper presents a full band (3.1 GHz to 10.6 GHz) current-reused low noise amplifier (LNA) for ultra wide band (UWB) system based on the TSMC 0.35 m bipolar silicon-germanium (SiGe) processes. The implemented LNA achieves the gain of 14.3 dB, the noise figure (NF) minimum of 2.5 dB and good input and output matching from 3.1 GHz to 10.6 GHz. The power consumption is only 5.4 mW under a 1.5 supply voltage. By adding a feedback resister in the second stage of the adopted current-reused topology, the gain flatness is less than 0.5 dB in every band group. The circuit occupies an area of 1.33 mm2.