Chin-Te Wang

Design of Flip-Chip Interconnect Using Epoxy-Based Underfill Up to

This study demonstrates a flip-chip interconnect with epoxy-based underfill (εr = 3.5 and tan δ = 0.02 at 10 MHz) for packaging applications up to V-band frequencies. To achieve the best interconnect performance, both the matching designs on GaAs chip and Al2O3 substrate were adopted with the underfill effects taken into consideration. The optimized flip-chip interconnect showed excellent performance from dc to 67 GHz with return loss below -20 dB and insertion loss less than 0.6 dB. Furthermore, the dielectric loss induced by the underfill was extracted from measurement and compared with the simulation results. The reliability tests including 85°C/85 % relative humidity test, thermal cycling test, and shear force test were performed. For the first time, the S-parameters measurement was performed to check the flip-chip reliability, and no performance decay was observed after 1000 thermal cycles. Moreover, the mechanical strength was improved about 12 times after the underfill was applied. The results show that the proposed flip-chip architecture has excellent reliability and can be applied for commercial applications.

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The rapid growth of high-frequency wireless communication demands high-performance packaging structures at low cost. A flip-chip interconnect is one of the most promising technologies owing to its low parasitic effect and high performance at high frequencies. In this study, the in-house fabricated In0.6Ga0.4As metamorphic high electron mobility transistor (mHEMT) device was flip-chip-assembled using a commercially available low-cost organic substrate. The packaged device with the optimal flip-chip structure exhibited almost similar DC and RF results to the bare die. An exopy-based underfill was applied to the improvement of reliability with almost no degradation of the electrical characteristics. Measurement results revealed that the proposed packaging structure maintained a low minimum noise figure of 3 dB with 6 dB associated gain at 62 GHz. Such a superior performance after flip-chip packaging demonstrates the feasibility of the proposed low-cost organic substrate for commercial high-frequency applications up to the W-band.

-Band Frequencies With Excellent Reliability

This study fabricated a 150 nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with IDS = 350 mA/mm and a transconductance of 600 mS/mm at VDS = 0.5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10 mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20 mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal–oxide–semiconductor (CMOS) technology with lower power consumption.

Flip-Chip Packaging of Low-Noise Metamorphic High Electron Mobility Transistors on Low-Cost Organic Substrate

HEMT suffers from parasitic resistance (Rsd) and capacitance(Cgd) effects with the shrinking of channel length, leading to degraded performance in logic and RF applications. A new while simple method to extract parasitic RC has been proposed to construct accurate transport parameters in HEMTs. In comparison to the constant-Rsd method, this new voltage dependent method provides more convincing results, especially for very short channel devices. On the other hand, an accurate Cgd correction method has also been incorporated to adequately represent the mobility. Finally, a guideline to design high performance HEMTs has been proposed.

V-Band Flip-Chip Assembled Gain Block Using In0.6Ga0.4As Metamorphic High-Electron-Mobility Transistor Technology

In this study, we have fabricated and characterized an In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device packaged using flip-chip-on-board (FCOB) technology. A low-cost polymer substrate was adopted as the carrier for cost-effective purposes. The impact of bonding temperature on the device performance was also experimentally investigated. While the DC performance was not as sensitive, serious degradation in RF performance was observed at high bonding temperature. Such degradation was mainly due to the thermal-mechanical stress resulting from the mismatch in the coefficient of thermal expansion (CTE) between the GaAs chip and the polymer substrate. Quantitative assessment was also performed through equivalent circuit extraction from S-parameter measurements.

A comprehensive transport model for high performance HEMTs considering the parasitic resistance and capacitance effects

The fabrication process of an 80 nm In<inf>0.7</inf>Ga<inf>0.3</inf>As MHEMT device with flip-chip packaging on Al<inf>2</inf>O<inf>3</inf> substrate is presented. The flip-chip packaged device exhibited good dc characteristics with high I<inf>DS</inf> = 425 mA/mm and high g<inf>m</inf> = 970 mS/mm at V<inf>DS</inf> = 1.5 V. Besides, the RF performances revealed high gain of 10 dB at 50 GHz and low minimum noise figure (NF<inf>min</inf>)below 2 dB at 60 GHz, showing the feasibility of flip-chip packaged In<inf>0.7</inf>Ga<inf>0.3</inf>As MHEMT device for low noise applications at W-band.

Assessment of Thermal Impact on Performance of Metamorphic High-Electron-Mobility Transistors on Polymer Substrates Using Flip-Chip-on-Board Technology

Due to the rapid growth of wireless communication systems, high frequency packages become very important and they require compactness, low cost and high performances even at frequency up to 60 GHz. Flip-chip assembly using organic substrate at very high frequency has become a cost competitive packaging method in semiconductor industries.

An 80 nm In 0.7 Ga 0.3 As MHEMT with flip-chip packaging for W-band low noise applications

A discrete low noise In0.6Ga0.4As MHEMT device with 150 nm gate length was flip-chip assembled on the low-cost RO3210 organic substrate for wireless communication applications. The measured DC characteristics were very similar before and after flip-chip assembly. The flip-chip packaged MHEMT device showed a high drain current density of 516 mA/mm and a maximum transconductance of 576 mS/mm at a VDS of 0.8 V. The insertion gain of the flip-chip packaged device was decayed less than 2 dB up to 100 GHz as compared to the data of bare die. Moreover, the measured minimum noise figure was less than 2 dB as measured at VDS of 0.7 V and VGS of -0.7 V in the frequency range from 20 to 64 GHz for the device after flip-chip assembly. The excellent performance of the flip-chip packaged MHEMT device demonstrates the feasibility of using low cost organic substrate for high frequency applications up to W band.